From 030b0d1bd4093515d32e24cafc6f90d1a8e08a4a Mon Sep 17 00:00:00 2001 From: vezde Date: Tue, 18 Oct 2022 10:33:48 +0200 Subject: [PATCH] sauvegarde avant basculement de branche --- doc/Flowchart-robot.drawio | 1 + software/dumber3/Core/Inc/batterie.h | 1 - software/dumber3/Core/Inc/cmd.h | 70 + software/dumber3/Core/Inc/config.h | 4 + software/dumber3/Core/Inc/leds.h | 5 +- software/dumber3/Core/Inc/main.h | 15 +- software/dumber3/Core/Inc/messages.h | 6 +- .../dumber3/Core/Inc/stm32l0xx_hal_conf.h | 2 +- software/dumber3/Core/Inc/stm32l0xx_it.h | 2 + software/dumber3/Core/Inc/xbee.h | 1 + software/dumber3/Core/Src/batterie.c | 13 +- software/dumber3/Core/Src/cmd.c | 150 + software/dumber3/Core/Src/leds.c | 47 +- software/dumber3/Core/Src/main.c | 875 +++--- software/dumber3/Core/Src/messages.c | 2 - software/dumber3/Core/Src/sequenceur.c | 232 +- software/dumber3/Core/Src/stm32l0xx_hal_msp.c | 299 +- software/dumber3/Core/Src/stm32l0xx_it.c | 30 + software/dumber3/Core/Src/syscalls.c | 23 + software/dumber3/Core/Src/xbee.c | 101 +- .../Inc/stm32l0xx_hal_lptim.h | 772 ++++++ .../Src/stm32l0xx_hal_lptim.c | 2457 +++++++++++++++++ software/dumber3/Dumber3.ioc | 116 +- 23 files changed, 4535 insertions(+), 689 deletions(-) create mode 100644 doc/Flowchart-robot.drawio create mode 100644 software/dumber3/Core/Inc/cmd.h create mode 100644 software/dumber3/Core/Src/cmd.c create mode 100644 software/dumber3/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h create mode 100644 software/dumber3/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lptim.c diff --git a/doc/Flowchart-robot.drawio b/doc/Flowchart-robot.drawio new file mode 100644 index 0000000..cb54907 --- /dev/null +++ b/doc/Flowchart-robot.drawio @@ -0,0 +1 @@ +7V1hc6I4GP41fnQHCKB8rNrd25n2zmlnbm8/7VCJyhwSD7Da/fWXSBBIsKKSBGw7s10IIcCb93ny5H0D7YHxavctctfLR+TBoGdo3q4HJj3D0DXLwf+Rkre0ZODYacEi8j1aKS949n/D7ExauvE9GJcqJggFib8uF85QGMJZUipzowhty9XmKChfde0uIFfwPHMDvvSH7yXLtHRo2Hn5H9BfLLMr6zZ94Bd39u8iQpuQXi9EIUyPrNysGfqM8dL10LZQBO57YBwhlKRbq90YBsSsmcXS874eOXq45QiGSZ0TprE/fRkZ3//2np7A/Z/OaDw1+1k/vbrBhtriOXGjZLOmN528ZTbaPyUkjek9MNou/QQ+r90ZObrFXoHLlskqoIdpqzBK4O7o/eoHK2DHgmgFk+gNV6EnAJMajvqUbtH9bd5DembcZaF3bFrmUqdYHJrOrYM3qIHOMdaAM1bPsAN82ZHnv+LNBdmcoi2McK2/wuwgvljheMUpWdFLxJa041TGE7CpMDDhaS9w43WK1rm/I54zmvtBMEYBivYNAW3/05C7OGV3Aby3VDmLIcxZhpyzfPewBamJ47Ublqxq/7chTJCatB+nNr0jJohg2jW0QqGzsAmdcrelzR7pN9UIBhV9IhnBDtcpT5uwdYayDNWG0jWNd1/isOOlGy2gcosN2zY26JpeZ3D44SazpYcWuOLEj92XANusHunKtrDN+KRhqjexwZn4AW1HblKyZrs80x6qNxs4S7bM5+0SHx2XPE1AkZE2w4rhQaq20TV+HOVNFnp3ZGqG92aBG8f+rGypHJhEAcKdn/xDtr9YdO8nrUe2J7tCtclbthPihymcRHZ/Fo/lp+33svPSW4UeNydkOgQ/DtpEM1hjSpCQUTE5OdHiuziCgZv4r+U7qeoweuoU+WFSUA4G4xpMl6cPQE8qTg6ZdswT7aTPx7Wz957D01zhUDovNyrgm4qPEyzFuiHu5gf3BQbE5WDs/ybDBHWEIm4DfxESV8UugK8ARgSx/swN7uiBle8R+Z5dgUYiaGO9A9ZOAP09OF3hHNehWa+SLs2guYDlHNndRzOVx43D2bCagTPbjl4Tz7iL3bdCtTWpEB+/X50RiWYpBIU30gYb5gpeBr7PFUcDMR2kCv2IVLjS8UzGP9B8HkNBVF8lRz+kdrDraoehGO3gOPjZS3M8/UK+4ZsCbFPCFYTJudUE24fYCcTdhDpQqwoscTg1LgKqoQypw7pIvVbI1YaX0xhSTbaphrQBGDDaYChFHPAJrQpxsM9x4Vo/yL/JN/x7FZOYHLm7urGEQhtfy82oERsRSrCPIVLWdzRBlGQJ8e8+G6kQKT/4JN4jSlAUU6WoOHzIpgJaED/U+UzWhx0InJoDAXWz5kcCmyHVSxWbeaoh4XqtKoTIkWwKzV/jlfcByFWMzO+zPSuQXI2qMF4jVKH3LookKWOKQwJV2exONVOcrRe16piVWL1oVMU+P0zgubAQrVHKsc1SV/aBRAqqig4KoCDjfQ5qXHS0lyAGDHAtYMmVEgYfUSyss4C7tR9VLAzoBD4NIV3P9Hyf6S+R6BQXVLpEIOgldZBHgmXog2yds6rMsWp90JxP8SGfJ7h34HTG0EXcXxtnuW7Gb1QtdJY/hh7L0egSYarXTwmLycwpx+m5Op6VA7ZjMR4pRMfzQapb0QBiIkl9xh0GQJ4IELh6bFAMKGp16WWgil9qBxRvNUrQmFOBqtATN5HPhMHjbYcSDTFTRomRRCBuTVrXOKK+Bml7pEA9SVQFh44lHfahvgsSw/chFhoa2p/8ukpumWeAGM0rMR0MWpfcbP1yNPoejniaYRclXkwzbEOCVr8CKctfQa3E6QN2V0Pbvxt1M9kKIEYDs92Yr3iQwD+mpLX3A3npCjkzFUu7kB041A4kpyvMWiLkFgFsCgqRyZMLprjF62fkL5pEq5wpQ2NotSzJUwaTX1degGYXQXjtsnL1IPxMIp6fnZCj2S/GOavZuYaE45zPInYc52pziKawHOJlr3mpA2n22YoaIBVEzapBeu3EeghkTKxNPhSUvUFmdvMNMlNQ6vAw2B8WEEkc/GUlD2sSSxeWEH0SS7Y2AagglgwdpW9puTNseD956yaxqP1ghSUsaHbOawYNQrntMTPLrsZN0/hkr5M9gGB81grIFSF7Vj5w/2WtXyjPJt5MPM8SE8/rM18v6eu2vBXKlrAIn/5F04YlfrEBeF9k4J0pjHz8UKRvP1rsj2UDy2LyMqJjAhYf+/skhlrE0LDepA6QQVEGDQiLMWIa0AdtogFZ7yo3xgMDNj8rnAdqfVTikweOoKjTPCAujFniADA8nwNa8H5E7S/jiPpinvK1idfGNg0przlbfGyz/IE80eRSWI0oaC2iJWYUyyaH2VvpDcxE8G7+Zz/S6vmfVQH3/wM= \ No newline at end of file diff --git a/software/dumber3/Core/Inc/batterie.h b/software/dumber3/Core/Inc/batterie.h index af5f9e7..bc32a8f 100644 --- a/software/dumber3/Core/Inc/batterie.h +++ b/software/dumber3/Core/Inc/batterie.h @@ -10,5 +10,4 @@ void BATTERIE_Init(void); - #endif /* INC_BATTERIE_H_ */ diff --git a/software/dumber3/Core/Inc/cmd.h b/software/dumber3/Core/Inc/cmd.h new file mode 100644 index 0000000..f5197d9 --- /dev/null +++ b/software/dumber3/Core/Inc/cmd.h @@ -0,0 +1,70 @@ +/* + * cmd.h + * + * Created on: 3 oct. 2022 + * Author: dimercur + */ + +#ifndef INC_CMD_H_ +#define INC_CMD_H_ + +#include "main.h" + +typedef enum { + pingCMD = 'p', + resetCMD = 'r', + setMotorCMD = 'm', + startWWatchDogCMD = 'W', + resetWatchdogCMD = 'w', + getBatteryVoltageCMD = 'v', + getVersionCMD = 'V', + startWithoutWatchCMD = 'u', + moveCMD = 'M', + turnCMD = 'T', + busyStateCMD = 'b', + testCMD = 't', + debugCMD = 'a', + powerOffCMD = 'z' +} CMD_Type; + +typedef enum { + okANS = 'O', + errANS = 'E', + unknownANS = 'C', + batOK = '2', + batLOW = '1', + batEMPTY = '0' +} ANS_Type; + +#define END_OF_CMD '\r' + +typedef struct { + CMD_Type type; +} CMD_Generic; + +typedef struct { + CMD_Type type; + int32_t motor_left; + int32_t motor_right; +} CMD_SetMotor; + +typedef struct { + CMD_Type type; + int32_t distance; +} CMD_Move; + +typedef struct { + CMD_Type type; + int32_t turns; +} CMD_Turn; + +#define CMD_DECODE_INVALID ((CMD_Generic*)NULL) +#define CMD_DECODE_UNKNOWN ((CMD_Generic*)UINT32_MAX) + +ANS_Type cmdIsValid(char* cmd); +CMD_Generic* cmdDecode(char* cmd); +void cmdSendAnswer(ANS_Type ans); +void cmdSendBatteryLevel(char level); +void cmdSendVersion(); + +#endif /* INC_CMD_H_ */ diff --git a/software/dumber3/Core/Inc/config.h b/software/dumber3/Core/Inc/config.h index 7e930da..aa7c185 100644 --- a/software/dumber3/Core/Inc/config.h +++ b/software/dumber3/Core/Inc/config.h @@ -7,6 +7,8 @@ #include "stm32l0xx_hal.h" #include "cmsis_os.h" +#define SYSTEM_VERSION_STR "version 2.0\r" + #define STACK_SIZE 0x100 #define PriorityMoteurs (configMAX_PRIORITIES -1) @@ -18,5 +20,7 @@ #define PriorityLeds (configMAX_PRIORITIES -7) #define BATTERIE_PERIODE_SCRUTATION 1000 +#define XBEE_TX_SEMAPHORE_WAIT 500 +#define XBEE_RX_BUFFER_MAX_LENGTH 50 TickType_t msToTicks(TickType_t ms); diff --git a/software/dumber3/Core/Inc/leds.h b/software/dumber3/Core/Inc/leds.h index 21d3994..5265848 100644 --- a/software/dumber3/Core/Inc/leds.h +++ b/software/dumber3/Core/Inc/leds.h @@ -25,7 +25,10 @@ typedef enum { leds_charge_bat_3, leds_charge_bat_4, leds_charge_bat_5, - leds_erreur + leds_erreur, + cmd_rcv_ok, + cmd_rcv_err, + cmd_rcv_unknown } LEDS_State; void LEDS_Init(void); diff --git a/software/dumber3/Core/Inc/main.h b/software/dumber3/Core/Inc/main.h index 50865c2..d4d2cf0 100644 --- a/software/dumber3/Core/Inc/main.h +++ b/software/dumber3/Core/Inc/main.h @@ -42,6 +42,7 @@ extern "C" { #include "batterie.h" #include "sequenceur.h" #include "xbee.h" +#include "cmd.h" /* USER CODE END Includes */ @@ -72,16 +73,18 @@ void Error_Handler(void); /* Private defines -----------------------------------------------------------*/ #define BATTERY_SENSE_Pin GPIO_PIN_0 #define BATTERY_SENSE_GPIO_Port GPIOA -#define PWM_B_GAUCHE_Pin GPIO_PIN_1 -#define PWM_B_GAUCHE_GPIO_Port GPIOA +#define ENC_PHA_GAUCHE_Pin GPIO_PIN_1 +#define ENC_PHA_GAUCHE_GPIO_Port GPIOA #define ENC_PHA_DROIT_Pin GPIO_PIN_2 #define ENC_PHA_DROIT_GPIO_Port GPIOA #define ENC_PHB_DROIT_Pin GPIO_PIN_3 #define ENC_PHB_DROIT_GPIO_Port GPIOA -#define ENC_PHB_GAUCHE_Pin GPIO_PIN_6 +#define ENC_PHB_GAUCHE_Pin GPIO_PIN_5 #define ENC_PHB_GAUCHE_GPIO_Port GPIOA -#define ENC_PHA_GAUCHE_Pin GPIO_PIN_7 -#define ENC_PHA_GAUCHE_GPIO_Port GPIOA +#define PWM_B_GAUCHE_Pin GPIO_PIN_6 +#define PWM_B_GAUCHE_GPIO_Port GPIOA +#define PWM_A_GAUCHE_Pin GPIO_PIN_7 +#define PWM_A_GAUCHE_GPIO_Port GPIOA #define PWM_A_DROIT_Pin GPIO_PIN_0 #define PWM_A_DROIT_GPIO_Port GPIOB #define PWM_B_DROIT_Pin GPIO_PIN_1 @@ -100,8 +103,6 @@ void Error_Handler(void); #define SHUTDOWN_ENCODERS_GPIO_Port GPIOB #define XBEE_RESET_Pin GPIO_PIN_10 #define XBEE_RESET_GPIO_Port GPIOA -#define PWM_A_GAUCHE_Pin GPIO_PIN_15 -#define PWM_A_GAUCHE_GPIO_Port GPIOA #define BUTTON_SENSE_Pin GPIO_PIN_3 #define BUTTON_SENSE_GPIO_Port GPIOB #define BUTTON_SENSE_EXTI_IRQn EXTI2_3_IRQn diff --git a/software/dumber3/Core/Inc/messages.h b/software/dumber3/Core/Inc/messages.h index 8f9a7d2..a927dc7 100644 --- a/software/dumber3/Core/Inc/messages.h +++ b/software/dumber3/Core/Inc/messages.h @@ -20,8 +20,6 @@ typedef struct { extern QueueHandle_t LEDS_Mailbox; extern QueueHandle_t MOTEURS_Mailbox; extern QueueHandle_t SEQUENCEUR_Mailbox; -extern QueueHandle_t BATTERIE_Mailbox; -extern QueueHandle_t XBEE_Mailbox; #define MSG_ID_NO_MESSAGE 0x00 @@ -39,9 +37,7 @@ extern QueueHandle_t XBEE_Mailbox; #define MSG_ID_MOTEURS_MARCHE 0x40 #define MSG_ID_MOTEURS_ARRET 0x41 -#define MSG_ID_XBEE_CMD_VALIDE 0x50 -#define MSG_ID_XBEE_CMD_INVALIDE 0x51 -#define MSG_ID_XBEE_REPONSE 0x52 +#define MSG_ID_XBEE_CMD 0x50 void MESSAGE_Init(void); MESSAGE_Typedef MESSAGE_ReadMailbox(QueueHandle_t mbx); diff --git a/software/dumber3/Core/Inc/stm32l0xx_hal_conf.h b/software/dumber3/Core/Inc/stm32l0xx_hal_conf.h index ad64f7f..f6c8934 100644 --- a/software/dumber3/Core/Inc/stm32l0xx_hal_conf.h +++ b/software/dumber3/Core/Inc/stm32l0xx_hal_conf.h @@ -46,7 +46,7 @@ /*#define HAL_I2S_MODULE_ENABLED */ /*#define HAL_IWDG_MODULE_ENABLED */ /*#define HAL_LCD_MODULE_ENABLED */ -/*#define HAL_LPTIM_MODULE_ENABLED */ +#define HAL_LPTIM_MODULE_ENABLED /*#define HAL_RNG_MODULE_ENABLED */ /*#define HAL_RTC_MODULE_ENABLED */ /*#define HAL_SPI_MODULE_ENABLED */ diff --git a/software/dumber3/Core/Inc/stm32l0xx_it.h b/software/dumber3/Core/Inc/stm32l0xx_it.h index 87740f8..fea60b2 100644 --- a/software/dumber3/Core/Inc/stm32l0xx_it.h +++ b/software/dumber3/Core/Inc/stm32l0xx_it.h @@ -52,7 +52,9 @@ void HardFault_Handler(void); void SysTick_Handler(void); void EXTI2_3_IRQHandler(void); void EXTI4_15_IRQHandler(void); +void DMA1_Channel2_3_IRQHandler(void); void ADC1_COMP_IRQHandler(void); +void LPTIM1_IRQHandler(void); void LPUART1_IRQHandler(void); /* USER CODE BEGIN EFP */ diff --git a/software/dumber3/Core/Inc/xbee.h b/software/dumber3/Core/Inc/xbee.h index 2ac582f..fd8f1c8 100644 --- a/software/dumber3/Core/Inc/xbee.h +++ b/software/dumber3/Core/Inc/xbee.h @@ -11,5 +11,6 @@ #include "main.h" void XBEE_Init(void); +int XBEE_SendData(char* data, int length); #endif /* INC_XBEE_H_ */ diff --git a/software/dumber3/Core/Src/batterie.c b/software/dumber3/Core/Src/batterie.c index b214136..d371c42 100644 --- a/software/dumber3/Core/Src/batterie.c +++ b/software/dumber3/Core/Src/batterie.c @@ -69,9 +69,12 @@ void BATTERIE_VoltageThread(void* params) { while (1) { if (BATTERIE_LireTension(&tension) ==0) { - MESSAGE_SendMailbox(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGE, BATTERIE_Mailbox, (void*)&tension); + if (HAL_GPIO_ReadPin(GPIOB, USB_SENSE_Pin)==GPIO_PIN_SET) // le chargeur est branché + MESSAGE_SendMailbox(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGE, (QueueHandle_t)0x0, (void*)&tension); + else + MESSAGE_SendMailbox(SEQUENCEUR_Mailbox, MSG_ID_BAT_NIVEAU, (QueueHandle_t)0x0, (void*)&tension); } else { - MESSAGE_SendMailbox(SEQUENCEUR_Mailbox, MSG_ID_BAT_ADC_ERR, BATTERIE_Mailbox, (void*)0x0); + MESSAGE_SendMailbox(SEQUENCEUR_Mailbox, MSG_ID_BAT_ADC_ERR, (QueueHandle_t)0x0, (void*)0x0); } vTaskDelay(pdMS_TO_TICKS(BATTERIE_PERIODE_SCRUTATION)); @@ -106,13 +109,13 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { if (GPIO_Pin == USB_SENSE_Pin) { // Le chargeur vient d'etre branché ou debranché if (HAL_GPIO_ReadPin(GPIOB, GPIO_Pin)==GPIO_PIN_SET) // le chargeur est branché - MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGEUR_ON, BATTERIE_Mailbox, 0x0, &xHigherPriorityTaskWoken); + MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGEUR_ON, (QueueHandle_t)0x0, 0x0, &xHigherPriorityTaskWoken); else - MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGEUR_OFF, BATTERIE_Mailbox, 0x0, &xHigherPriorityTaskWoken); + MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGEUR_OFF, (QueueHandle_t)0x0, 0x0, &xHigherPriorityTaskWoken); } else if (GPIO_Pin == BUTTON_SENSE_Pin) { // on vient d'appuyer sur le bouton on/off if (HAL_GPIO_ReadPin(GPIOB, GPIO_Pin)==GPIO_PIN_SET) // le chargeur est branché - MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BUTTON_PRESSED, BATTERIE_Mailbox, 0x0, &xHigherPriorityTaskWoken); + MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BUTTON_PRESSED, (QueueHandle_t)0x0, 0x0, &xHigherPriorityTaskWoken); } if (xHigherPriorityTaskWoken) { diff --git a/software/dumber3/Core/Src/cmd.c b/software/dumber3/Core/Src/cmd.c new file mode 100644 index 0000000..ad5cdb7 --- /dev/null +++ b/software/dumber3/Core/Src/cmd.c @@ -0,0 +1,150 @@ +/* + * cmd.c + * + * Created on: 3 oct. 2022 + * Author: dimercur + */ + +#include "cmd.h" +#include +#include +#include + +/* Definition des commandes */ + +//void cmdAddChecksum(char* ans) { +// uint16_t j; +// unsigned char checksum=0; +// +// for (j = 0; ans[j] != END_OF_CMD; j++) +// checksum ^= ans[j]; +// if (checksum == END_OF_CMD) +// checksum++; +// ans[j] = checksum; +// ans[j + 1] = END_OF_CMD; +//} + +/** + * @brief Verifie le checksum de la commande recue + * + * Vérifie le dernier carctére de receiptString sensé être le checksum. + * Si celui-ci est bon, ll retournera 0 et supprimera le checksum du tableau receiptString + * sinon il retournera 1 sans faire de modification. + * @param None + * @retval 0 ou 1 + * + */ +ANS_Type cmdVerifyChecksum(char* cmd) { + uint16_t j; + uint16_t length; + unsigned char checksum=0; + + length = strlen(cmd); + for (j = 0; j < length - 2; j++) { + checksum ^= cmd[j]; + } + if (checksum == END_OF_CMD) + checksum++; + + if (cmd[j] == checksum) { + cmd[length - 2] = 0; + cmd[length - 1] = 0; + cmd[length] = 0; + + return okANS; + } else + return errANS; +} + +ANS_Type cmdIsValid(char* cmd) { + uint16_t j; + uint16_t length; + unsigned char checksum=0; + + length = strlen(cmd); + for (j = 0; j < length - 2; j++) { + checksum ^= cmd[j]; + } + if (checksum == END_OF_CMD) + checksum++; + + if (cmd[j] == checksum) + return okANS; + else + return errANS; +} + +CMD_Generic* cmdDecode(char* cmd) { + CMD_Generic* decodedCmd; + + if (cmdVerifyChecksum(cmd) != okANS) + return CMD_DECODE_INVALID; + else if (cmd[0] == moveCMD) { + int32_t laps; + uint16_t testReception = sscanf(cmd, "M=%li", &laps); + + if (testReception!=1) return CMD_DECODE_INVALID; + else { + decodedCmd=(CMD_Generic*)malloc(sizeof(CMD_Move)); + ((CMD_Move*)decodedCmd)->type = moveCMD; + ((CMD_Move*)decodedCmd)->distance = laps; + } + } else if (cmd[0] == turnCMD) { + int32_t degree; + uint16_t testReception = sscanf(cmd, "T=%li", °ree); + + if (testReception != 1) return CMD_DECODE_INVALID; + else { + degree = degree * 1.40; + decodedCmd=(CMD_Generic*)malloc(sizeof(CMD_Turn)); + ((CMD_Turn*)decodedCmd)->type = moveCMD; + ((CMD_Turn*)decodedCmd)->turns= degree; + } + } else if (cmd[0] == setMotorCMD) { + int32_t moteurG,moteurD; + uint16_t testReception = sscanf(cmd, "m=%li,%li", &moteurG, &moteurD); + + if (testReception != 1) return CMD_DECODE_INVALID; + else { + decodedCmd=(CMD_Generic*)malloc(sizeof(CMD_SetMotor)); + ((CMD_SetMotor*)decodedCmd)->type = moveCMD; + ((CMD_SetMotor*)decodedCmd)->motor_left= moteurG; + ((CMD_SetMotor*)decodedCmd)->motor_right= moteurD; + } + } else if ((cmd[0] == pingCMD) || (cmd[0] == resetCMD) || (cmd[0] == startWWatchDogCMD) || (cmd[0] == resetWatchdogCMD) || + (cmd[0] == getBatteryVoltageCMD) || (cmd[0] == getVersionCMD) || (cmd[0] == startWithoutWatchCMD) || (cmd[0] == busyStateCMD) || + (cmd[0] == testCMD) || (cmd[0] == debugCMD) || (cmd[0] == powerOffCMD)) { + decodedCmd=(CMD_Generic*)malloc(sizeof(CMD_Generic)); + decodedCmd->type = cmd[0]; + } else return CMD_DECODE_UNKNOWN; + + return decodedCmd; +} + +void cmdSendAnswer(ANS_Type ans) { + char cmdStr[4]; + cmdStr[0] = (char)ans; + cmdStr[1] = (char)ans; + cmdStr[2] = END_OF_CMD; + cmdStr[3] = 0; // end of string + XBEE_SendData(cmdStr, 3); +} + +void cmdSendBatteryLevel(char level) { + char cmdStr[4]; + char localLevel=level; + + if (localLevel<0) localLevel=0; + else if (localLevel>2) localLevel=2; + + cmdStr[0] = localLevel+'0'; + cmdStr[1] = localLevel+'0'; + cmdStr[2] = END_OF_CMD; + cmdStr[3] = 0; // end of string + XBEE_SendData(cmdStr, 3); +} + +void cmdSendVersion() { + XBEE_SendData(SYSTEM_VERSION_STR, strlen(SYSTEM_VERSION_STR)); +} + diff --git a/software/dumber3/Core/Src/leds.c b/software/dumber3/Core/Src/leds.c index 7682125..2078f66 100644 --- a/software/dumber3/Core/Src/leds.c +++ b/software/dumber3/Core/Src/leds.c @@ -49,19 +49,18 @@ void LEDS_Init(void) { vTaskResume(xHandleLeds); } - void LEDS_AnimationThread(void* params) { MESSAGE_Typedef msg; uint8_t cnt=0; + static int oneShot=1; while (1) { vTaskDelay(pdMS_TO_TICKS(100)); msg = MESSAGE_ReadMailboxNoDelay(LEDS_Mailbox); - cnt++; - if (msg.id == MSG_ID_LED_ETAT) { // Si c'est bien un message de changemnet d'etat LEDS + if (msg.id == MSG_ID_LED_ETAT) { // Si c'est bien un message de changement d'etat LEDS LEDS_Animation = *((LEDS_State*)msg.data); if (LEDS_Animation != LEDS_AnimationAncien) { // si le nouvel etat est different de l'ancien @@ -73,6 +72,12 @@ void LEDS_AnimationThread(void* params) { LEDS_EteintRouge(); cnt=0; } + + if ((LEDS_Animation == cmd_rcv_ok) || (LEDS_Animation == cmd_rcv_err) || (LEDS_Animation == cmd_rcv_unknown)) + { + oneShot =1; + cnt=0; + } } switch (LEDS_Animation) { @@ -193,6 +198,42 @@ void LEDS_AnimationThread(void* params) { else cnt=0; break; + case cmd_rcv_ok: + if (oneShot) { + if (cnt<3) + LEDS_AllumeVerte(); + else if (cnt<10) + LEDS_EteintVerte(); + else { + cnt=0; + oneShot=0; + } + } + break; + case cmd_rcv_err: + if (oneShot) { + if (cnt<3) + LEDS_AllumeRouge(); + else if (cnt<10) + LEDS_EteintRouge(); + else { + cnt=0; + oneShot=0; + } + } + break; + case cmd_rcv_unknown: + if (oneShot) { + if (cnt<3) + LEDS_AllumeJaune(); + else if (cnt<10) + LEDS_EteintJaune(); + else { + cnt=0; + oneShot=0; + } + } + break; default: break; } diff --git a/software/dumber3/Core/Src/main.c b/software/dumber3/Core/Src/main.c index a1f08a2..dbe36d7 100644 --- a/software/dumber3/Core/Src/main.c +++ b/software/dumber3/Core/Src/main.c @@ -48,20 +48,22 @@ /* Private variables ---------------------------------------------------------*/ ADC_HandleTypeDef hadc; +LPTIM_HandleTypeDef hlptim1; + UART_HandleTypeDef hlpuart1; +DMA_HandleTypeDef hdma_lpuart1_tx; TIM_HandleTypeDef htim2; TIM_HandleTypeDef htim3; TIM_HandleTypeDef htim21; -TIM_HandleTypeDef htim22; /* Definitions for defaultTask */ -osThreadId_t defaultTaskHandle; -const osThreadAttr_t defaultTask_attributes = { - .name = "defaultTask", - .stack_size = 128 * 4, - .priority = (osPriority_t) osPriorityNormal, -}; +//osThreadId_t defaultTaskHandle; +//const osThreadAttr_t defaultTask_attributes = { +// .name = "defaultTask", +// .stack_size = 128 * 4, +// .priority = (osPriority_t) osPriorityNormal, +//}; /* USER CODE BEGIN PV */ /* USER CODE END PV */ @@ -74,7 +76,8 @@ static void MX_LPUART1_UART_Init(void); static void MX_TIM2_Init(void); static void MX_TIM3_Init(void); static void MX_TIM21_Init(void); -static void MX_TIM22_Init(void); +static void MX_DMA_Init(void); +static void MX_LPTIM1_Init(void); void StartDefaultTask(void *argument); /* USER CODE BEGIN PFP */ @@ -87,534 +90,534 @@ void StartDefaultTask(void *argument); /* USER CODE END 0 */ /** - * @brief The application entry point. - * @retval int - */ + * @brief The application entry point. + * @retval int + */ int main(void) { - /* USER CODE BEGIN 1 */ + /* USER CODE BEGIN 1 */ - /* USER CODE END 1 */ + /* USER CODE END 1 */ - /* MCU Configuration--------------------------------------------------------*/ + /* MCU Configuration--------------------------------------------------------*/ - /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - HAL_Init(); + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); - /* USER CODE BEGIN Init */ + /* USER CODE BEGIN Init */ - /* USER CODE END Init */ + /* USER CODE END Init */ - /* Configure the system clock */ - SystemClock_Config(); + /* Configure the system clock */ + SystemClock_Config(); - /* USER CODE BEGIN SysInit */ + /* USER CODE BEGIN SysInit */ - /* USER CODE END SysInit */ + /* USER CODE END SysInit */ - /* Initialize all configured peripherals */ - MX_GPIO_Init(); - MX_ADC_Init(); - MX_LPUART1_UART_Init(); - MX_TIM2_Init(); - MX_TIM3_Init(); - MX_TIM21_Init(); - MX_TIM22_Init(); - /* USER CODE BEGIN 2 */ + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_ADC_Init(); + MX_LPUART1_UART_Init(); + MX_TIM2_Init(); + MX_TIM3_Init(); + MX_TIM21_Init(); + MX_DMA_Init(); + MX_LPTIM1_Init(); + /* USER CODE BEGIN 2 */ /* Init des messages box */ MESSAGE_Init(); LEDS_Init(); XBEE_Init(); - BATTERIE_Init(); - MOTEURS_Init(); + //BATTERIE_Init(); + //MOTEURS_Init(); SEQUENCEUR_Init(); /*MOTEURS_Init(); - MOTEURS_Test();*/ - /* USER CODE END 2 */ + MOTEURS_Test();*/ + /* USER CODE END 2 */ - /* Init scheduler */ - osKernelInitialize(); + /* Init scheduler */ + osKernelInitialize(); - /* USER CODE BEGIN RTOS_MUTEX */ + /* USER CODE BEGIN RTOS_MUTEX */ /* add mutexes, ... */ - /* USER CODE END RTOS_MUTEX */ + /* USER CODE END RTOS_MUTEX */ - /* USER CODE BEGIN RTOS_SEMAPHORES */ + /* USER CODE BEGIN RTOS_SEMAPHORES */ /* add semaphores, ... */ - /* USER CODE END RTOS_SEMAPHORES */ + /* USER CODE END RTOS_SEMAPHORES */ - /* USER CODE BEGIN RTOS_TIMERS */ + /* USER CODE BEGIN RTOS_TIMERS */ /* start timers, add new ones, ... */ - /* USER CODE END RTOS_TIMERS */ + /* USER CODE END RTOS_TIMERS */ - /* USER CODE BEGIN RTOS_QUEUES */ + /* USER CODE BEGIN RTOS_QUEUES */ /* add queues, ... */ - /* USER CODE END RTOS_QUEUES */ + /* USER CODE END RTOS_QUEUES */ - /* Create the thread(s) */ - /* creation of defaultTask */ - defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes); + /* Create the thread(s) */ + /* creation of defaultTask */ + //defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes); - /* USER CODE BEGIN RTOS_THREADS */ + /* USER CODE BEGIN RTOS_THREADS */ /* add threads, ... */ - /* USER CODE END RTOS_THREADS */ + /* USER CODE END RTOS_THREADS */ - /* USER CODE BEGIN RTOS_EVENTS */ + /* USER CODE BEGIN RTOS_EVENTS */ /* add events, ... */ - /* USER CODE END RTOS_EVENTS */ + /* USER CODE END RTOS_EVENTS */ - /* Start scheduler */ - osKernelStart(); + /* Start scheduler */ + osKernelStart(); - /* We should never get here as control is now taken by the scheduler */ - /* Infinite loop */ - /* USER CODE BEGIN WHILE */ + /* We should never get here as control is now taken by the scheduler */ + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ while (1) { - /* USER CODE END WHILE */ + /* USER CODE END WHILE */ - /* USER CODE BEGIN 3 */ + /* USER CODE BEGIN 3 */ } - /* USER CODE END 3 */ + /* USER CODE END 3 */ } /** - * @brief System Clock Configuration - * @retval None - */ + * @brief System Clock Configuration + * @retval None + */ void SystemClock_Config(void) { - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /** Configure the main internal regulator output voltage - */ - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /** Initializes the RCC Oscillators according to the specified parameters - * in the RCC_OscInitTypeDef structure. - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_DIV4; - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_3; - RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { - Error_Handler(); - } - /** Initializes the CPU, AHB and APB buses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_DIV4; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_3; + RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - { - Error_Handler(); - } - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; - PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - { - Error_Handler(); - } + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1|RCC_PERIPHCLK_LPTIM1; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; + PeriphClkInit.LptimClockSelection = RCC_LPTIM1CLKSOURCE_PCLK; + + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } } /** - * @brief ADC Initialization Function - * @param None - * @retval None - */ + * @brief ADC Initialization Function + * @param None + * @retval None + */ static void MX_ADC_Init(void) { - /* USER CODE BEGIN ADC_Init 0 */ + /* USER CODE BEGIN ADC_Init 0 */ - /* USER CODE END ADC_Init 0 */ + /* USER CODE END ADC_Init 0 */ - ADC_ChannelConfTypeDef sConfig = {0}; + ADC_ChannelConfTypeDef sConfig = {0}; - /* USER CODE BEGIN ADC_Init 1 */ + /* USER CODE BEGIN ADC_Init 1 */ - /* USER CODE END ADC_Init 1 */ - /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) - */ - hadc.Instance = ADC1; - hadc.Init.OversamplingMode = DISABLE; - hadc.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV1; - hadc.Init.Resolution = ADC_RESOLUTION_8B; - hadc.Init.SamplingTime = ADC_SAMPLETIME_160CYCLES_5; - hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; - hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; - hadc.Init.ContinuousConvMode = DISABLE; - hadc.Init.DiscontinuousConvMode = DISABLE; - hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; - hadc.Init.DMAContinuousRequests = DISABLE; - hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; - hadc.Init.LowPowerAutoWait = DISABLE; - hadc.Init.LowPowerFrequencyMode = DISABLE; - hadc.Init.LowPowerAutoPowerOff = DISABLE; - if (HAL_ADC_Init(&hadc) != HAL_OK) - { - Error_Handler(); - } - /** Configure for the selected ADC regular channel to be converted. - */ - sConfig.Channel = ADC_CHANNEL_0; - sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; - if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN ADC_Init 2 */ + /* USER CODE END ADC_Init 1 */ + /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) + */ + hadc.Instance = ADC1; + hadc.Init.OversamplingMode = DISABLE; + hadc.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV1; + hadc.Init.Resolution = ADC_RESOLUTION_8B; + hadc.Init.SamplingTime = ADC_SAMPLETIME_160CYCLES_5; + hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; + hadc.Init.ContinuousConvMode = DISABLE; + hadc.Init.DiscontinuousConvMode = DISABLE; + hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; + hadc.Init.DMAContinuousRequests = DISABLE; + hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; + hadc.Init.LowPowerAutoWait = DISABLE; + hadc.Init.LowPowerFrequencyMode = DISABLE; + hadc.Init.LowPowerAutoPowerOff = DISABLE; + if (HAL_ADC_Init(&hadc) != HAL_OK) + { + Error_Handler(); + } + /** Configure for the selected ADC regular channel to be converted. + */ + sConfig.Channel = ADC_CHANNEL_0; + sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; + if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN ADC_Init 2 */ - /* USER CODE END ADC_Init 2 */ + /* USER CODE END ADC_Init 2 */ } /** - * @brief LPUART1 Initialization Function - * @param None - * @retval None - */ + * @brief LPTIM1 Initialization Function + * @param None + * @retval None + */ +static void MX_LPTIM1_Init(void) +{ + + /* USER CODE BEGIN LPTIM1_Init 0 */ + + /* USER CODE END LPTIM1_Init 0 */ + + /* USER CODE BEGIN LPTIM1_Init 1 */ + + /* USER CODE END LPTIM1_Init 1 */ + hlptim1.Instance = LPTIM1; + hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC; + hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1; + hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE; + hlptim1.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH; + hlptim1.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE; + hlptim1.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL; + if (HAL_LPTIM_Init(&hlptim1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN LPTIM1_Init 2 */ + + /* USER CODE END LPTIM1_Init 2 */ + +} + +/** + * @brief LPUART1 Initialization Function + * @param None + * @retval None + */ static void MX_LPUART1_UART_Init(void) { - /* USER CODE BEGIN LPUART1_Init 0 */ + /* USER CODE BEGIN LPUART1_Init 0 */ - /* USER CODE END LPUART1_Init 0 */ + /* USER CODE END LPUART1_Init 0 */ - /* USER CODE BEGIN LPUART1_Init 1 */ + /* USER CODE BEGIN LPUART1_Init 1 */ - /* USER CODE END LPUART1_Init 1 */ - hlpuart1.Instance = LPUART1; - hlpuart1.Init.BaudRate = 9600; - hlpuart1.Init.WordLength = UART_WORDLENGTH_8B; - hlpuart1.Init.StopBits = UART_STOPBITS_1; - hlpuart1.Init.Parity = UART_PARITY_NONE; - hlpuart1.Init.Mode = UART_MODE_TX_RX; - hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - if (HAL_UART_Init(&hlpuart1) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN LPUART1_Init 2 */ + /* USER CODE END LPUART1_Init 1 */ + hlpuart1.Instance = LPUART1; + hlpuart1.Init.BaudRate = 9600; + hlpuart1.Init.WordLength = UART_WORDLENGTH_8B; + hlpuart1.Init.StopBits = UART_STOPBITS_1; + hlpuart1.Init.Parity = UART_PARITY_NONE; + hlpuart1.Init.Mode = UART_MODE_TX_RX; + hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&hlpuart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN LPUART1_Init 2 */ - /* USER CODE END LPUART1_Init 2 */ + /* USER CODE END LPUART1_Init 2 */ } /** - * @brief TIM2 Initialization Function - * @param None - * @retval None - */ + * @brief TIM2 Initialization Function + * @param None + * @retval None + */ static void MX_TIM2_Init(void) { - /* USER CODE BEGIN TIM2_Init 0 */ + /* USER CODE BEGIN TIM2_Init 0 */ - /* USER CODE END TIM2_Init 0 */ + /* USER CODE END TIM2_Init 0 */ - TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - TIM_MasterConfigTypeDef sMasterConfig = {0}; - TIM_OC_InitTypeDef sConfigOC = {0}; + TIM_Encoder_InitTypeDef sConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; - /* USER CODE BEGIN TIM2_Init 1 */ + /* USER CODE BEGIN TIM2_Init 1 */ - /* USER CODE END TIM2_Init 1 */ - htim2.Instance = TIM2; - htim2.Init.Prescaler = 0; - htim2.Init.CounterMode = TIM_COUNTERMODE_UP; - htim2.Init.Period = 65535; - htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - if (HAL_TIM_Base_Init(&htim2) != HAL_OK) - { - Error_Handler(); - } - sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) - { - Error_Handler(); - } - if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) - { - Error_Handler(); - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) - { - Error_Handler(); - } - sConfigOC.OCMode = TIM_OCMODE_PWM1; - sConfigOC.Pulse = 0; - sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - { - Error_Handler(); - } - if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN TIM2_Init 2 */ + /* USER CODE END TIM2_Init 1 */ + htim2.Instance = TIM2; + htim2.Init.Prescaler = 0; + htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + htim2.Init.Period = 65535; + htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + sConfig.EncoderMode = TIM_ENCODERMODE_TI1; + sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; + sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; + sConfig.IC1Prescaler = TIM_ICPSC_DIV1; + sConfig.IC1Filter = 0; + sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; + sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; + sConfig.IC2Prescaler = TIM_ICPSC_DIV1; + sConfig.IC2Filter = 0; + if (HAL_TIM_Encoder_Init(&htim2, &sConfig) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM2_Init 2 */ - /* USER CODE END TIM2_Init 2 */ - HAL_TIM_MspPostInit(&htim2); + /* USER CODE END TIM2_Init 2 */ } /** - * @brief TIM3 Initialization Function - * @param None - * @retval None - */ + * @brief TIM3 Initialization Function + * @param None + * @retval None + */ static void MX_TIM3_Init(void) { - /* USER CODE BEGIN TIM3_Init 0 */ + /* USER CODE BEGIN TIM3_Init 0 */ - /* USER CODE END TIM3_Init 0 */ + /* USER CODE END TIM3_Init 0 */ - TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - TIM_MasterConfigTypeDef sMasterConfig = {0}; - TIM_OC_InitTypeDef sConfigOC = {0}; + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; - /* USER CODE BEGIN TIM3_Init 1 */ + /* USER CODE BEGIN TIM3_Init 1 */ - /* USER CODE END TIM3_Init 1 */ - htim3.Instance = TIM3; - htim3.Init.Prescaler = 0; - htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - htim3.Init.Period = 65535; - htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - if (HAL_TIM_Base_Init(&htim3) != HAL_OK) - { - Error_Handler(); - } - sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) - { - Error_Handler(); - } - if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) - { - Error_Handler(); - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - { - Error_Handler(); - } - sConfigOC.OCMode = TIM_OCMODE_PWM1; - sConfigOC.Pulse = 0; - sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - { - Error_Handler(); - } - if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN TIM3_Init 2 */ + /* USER CODE END TIM3_Init 1 */ + htim3.Instance = TIM3; + htim3.Init.Prescaler = 0; + htim3.Init.CounterMode = TIM_COUNTERMODE_UP; + htim3.Init.Period = 65535; + htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim3) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 0; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIMEx_RemapConfig(&htim3, TIM3_TI1_GPIO) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM3_Init 2 */ - /* USER CODE END TIM3_Init 2 */ - HAL_TIM_MspPostInit(&htim3); + /* USER CODE END TIM3_Init 2 */ + HAL_TIM_MspPostInit(&htim3); } /** - * @brief TIM21 Initialization Function - * @param None - * @retval None - */ + * @brief TIM21 Initialization Function + * @param None + * @retval None + */ static void MX_TIM21_Init(void) { - /* USER CODE BEGIN TIM21_Init 0 */ + /* USER CODE BEGIN TIM21_Init 0 */ - /* USER CODE END TIM21_Init 0 */ + /* USER CODE END TIM21_Init 0 */ - TIM_Encoder_InitTypeDef sConfig = {0}; - TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_Encoder_InitTypeDef sConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; - /* USER CODE BEGIN TIM21_Init 1 */ + /* USER CODE BEGIN TIM21_Init 1 */ - /* USER CODE END TIM21_Init 1 */ - htim21.Instance = TIM21; - htim21.Init.Prescaler = 0; - htim21.Init.CounterMode = TIM_COUNTERMODE_UP; - htim21.Init.Period = 65535; - htim21.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim21.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - sConfig.EncoderMode = TIM_ENCODERMODE_TI1; - sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; - sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; - sConfig.IC1Prescaler = TIM_ICPSC_DIV1; - sConfig.IC1Filter = 0; - sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; - sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; - sConfig.IC2Prescaler = TIM_ICPSC_DIV1; - sConfig.IC2Filter = 0; - if (HAL_TIM_Encoder_Init(&htim21, &sConfig) != HAL_OK) - { - Error_Handler(); - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&htim21, &sMasterConfig) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN TIM21_Init 2 */ + /* USER CODE END TIM21_Init 1 */ + htim21.Instance = TIM21; + htim21.Init.Prescaler = 0; + htim21.Init.CounterMode = TIM_COUNTERMODE_UP; + htim21.Init.Period = 65535; + htim21.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim21.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + sConfig.EncoderMode = TIM_ENCODERMODE_TI1; + sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; + sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; + sConfig.IC1Prescaler = TIM_ICPSC_DIV1; + sConfig.IC1Filter = 0; + sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; + sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; + sConfig.IC2Prescaler = TIM_ICPSC_DIV1; + sConfig.IC2Filter = 0; + if (HAL_TIM_Encoder_Init(&htim21, &sConfig) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim21, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM21_Init 2 */ - /* USER CODE END TIM21_Init 2 */ + /* USER CODE END TIM21_Init 2 */ } /** - * @brief TIM22 Initialization Function - * @param None - * @retval None - */ -static void MX_TIM22_Init(void) + * Enable DMA controller clock + */ +static void MX_DMA_Init(void) { - /* USER CODE BEGIN TIM22_Init 0 */ + /* DMA controller clock enable */ + __HAL_RCC_DMA1_CLK_ENABLE(); - /* USER CODE END TIM22_Init 0 */ - - TIM_Encoder_InitTypeDef sConfig = {0}; - TIM_MasterConfigTypeDef sMasterConfig = {0}; - - /* USER CODE BEGIN TIM22_Init 1 */ - - /* USER CODE END TIM22_Init 1 */ - htim22.Instance = TIM22; - htim22.Init.Prescaler = 0; - htim22.Init.CounterMode = TIM_COUNTERMODE_UP; - htim22.Init.Period = 65535; - htim22.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim22.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - sConfig.EncoderMode = TIM_ENCODERMODE_TI1; - sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; - sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; - sConfig.IC1Prescaler = TIM_ICPSC_DIV1; - sConfig.IC1Filter = 0; - sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; - sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; - sConfig.IC2Prescaler = TIM_ICPSC_DIV1; - sConfig.IC2Filter = 0; - if (HAL_TIM_Encoder_Init(&htim22, &sConfig) != HAL_OK) - { - Error_Handler(); - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&htim22, &sMasterConfig) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN TIM22_Init 2 */ - - /* USER CODE END TIM22_Init 2 */ + /* DMA interrupt init */ + /* DMA1_Channel2_3_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 3, 0); + HAL_NVIC_EnableIRQ(DMA1_Channel2_3_IRQn); } /** - * @brief GPIO Initialization Function - * @param None - * @retval None - */ + * @brief GPIO Initialization Function + * @param None + * @retval None + */ static void MX_GPIO_Init(void) { - GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitTypeDef GPIO_InitStruct = {0}; - /* GPIO Ports Clock Enable */ - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOB, LED_ROUGE_Pin|LED_ORANGE_Pin|LED_VERTE_Pin|SHUTDOWN_5V_Pin, GPIO_PIN_RESET); + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOB, LED_ROUGE_Pin|LED_ORANGE_Pin|LED_VERTE_Pin|SHUTDOWN_5V_Pin, GPIO_PIN_RESET); - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOB, SHUTDOWN_ENCODERS_Pin|SHUTDOWN_Pin, GPIO_PIN_SET); + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOB, SHUTDOWN_ENCODERS_Pin|SHUTDOWN_Pin, GPIO_PIN_SET); - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(XBEE_RESET_GPIO_Port, XBEE_RESET_Pin, GPIO_PIN_RESET); + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(XBEE_RESET_GPIO_Port, XBEE_RESET_Pin, GPIO_PIN_RESET); - /*Configure GPIO pins : LED_ROUGE_Pin LED_ORANGE_Pin LED_VERTE_Pin */ - GPIO_InitStruct.Pin = LED_ROUGE_Pin|LED_ORANGE_Pin|LED_VERTE_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + /*Configure GPIO pins : LED_ROUGE_Pin LED_ORANGE_Pin LED_VERTE_Pin */ + GPIO_InitStruct.Pin = LED_ROUGE_Pin|LED_ORANGE_Pin|LED_VERTE_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - /*Configure GPIO pins : SHUTDOWN_ENCODERS_Pin SHUTDOWN_5V_Pin */ - GPIO_InitStruct.Pin = SHUTDOWN_ENCODERS_Pin|SHUTDOWN_5V_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + /*Configure GPIO pins : SHUTDOWN_ENCODERS_Pin SHUTDOWN_5V_Pin */ + GPIO_InitStruct.Pin = SHUTDOWN_ENCODERS_Pin|SHUTDOWN_5V_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - /*Configure GPIO pin : XBEE_RESET_Pin */ - GPIO_InitStruct.Pin = XBEE_RESET_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(XBEE_RESET_GPIO_Port, &GPIO_InitStruct); + /*Configure GPIO pin : XBEE_RESET_Pin */ + GPIO_InitStruct.Pin = XBEE_RESET_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(XBEE_RESET_GPIO_Port, &GPIO_InitStruct); - /*Configure GPIO pin : BUTTON_SENSE_Pin */ - GPIO_InitStruct.Pin = BUTTON_SENSE_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(BUTTON_SENSE_GPIO_Port, &GPIO_InitStruct); + /*Configure GPIO pin : BUTTON_SENSE_Pin */ + GPIO_InitStruct.Pin = BUTTON_SENSE_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(BUTTON_SENSE_GPIO_Port, &GPIO_InitStruct); - /*Configure GPIO pin : USB_SENSE_Pin */ - GPIO_InitStruct.Pin = USB_SENSE_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(USB_SENSE_GPIO_Port, &GPIO_InitStruct); + /*Configure GPIO pin : USB_SENSE_Pin */ + GPIO_InitStruct.Pin = USB_SENSE_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(USB_SENSE_GPIO_Port, &GPIO_InitStruct); - /*Configure GPIO pins : CHARGER_ST2_Pin CHARGER_ST1_Pin */ - GPIO_InitStruct.Pin = CHARGER_ST2_Pin|CHARGER_ST1_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + /*Configure GPIO pins : CHARGER_ST2_Pin CHARGER_ST1_Pin */ + GPIO_InitStruct.Pin = CHARGER_ST2_Pin|CHARGER_ST1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - /*Configure GPIO pin : SHUTDOWN_Pin */ - GPIO_InitStruct.Pin = SHUTDOWN_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(SHUTDOWN_GPIO_Port, &GPIO_InitStruct); + /*Configure GPIO pin : SHUTDOWN_Pin */ + GPIO_InitStruct.Pin = SHUTDOWN_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(SHUTDOWN_GPIO_Port, &GPIO_InitStruct); - /* EXTI interrupt init*/ - HAL_NVIC_SetPriority(EXTI2_3_IRQn, 3, 0); - HAL_NVIC_EnableIRQ(EXTI2_3_IRQn); + /* EXTI interrupt init*/ + HAL_NVIC_SetPriority(EXTI2_3_IRQn, 3, 0); + HAL_NVIC_EnableIRQ(EXTI2_3_IRQn); - HAL_NVIC_SetPriority(EXTI4_15_IRQn, 3, 0); - HAL_NVIC_EnableIRQ(EXTI4_15_IRQn); + HAL_NVIC_SetPriority(EXTI4_15_IRQn, 3, 0); + HAL_NVIC_EnableIRQ(EXTI4_15_IRQn); } @@ -641,54 +644,54 @@ TickType_t msToTicks(TickType_t ms) { * @retval None */ /* USER CODE END Header_StartDefaultTask */ -void StartDefaultTask(void *argument) -{ - /* USER CODE BEGIN 5 */ - LEDS_State state = leds_off; - - /* Infinite loop */ - for(;;) - { - state++; - MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&state); - - if (state>leds_erreur) - state = leds_off; - - vTaskDelay(pdMS_TO_TICKS(5000)); - } - /* USER CODE END 5 */ -} +//void StartDefaultTask(void *argument) +//{ +// /* USER CODE BEGIN 5 */ +// LEDS_State state = leds_off; +// +// /* Infinite loop */ +// for(;;) +// { +// state++; +// MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&state); +// +// if (state>leds_erreur) +// state = leds_off; +// +// vTaskDelay(pdMS_TO_TICKS(5000)); +// } +// /* USER CODE END 5 */ +//} /** - * @brief This function is executed in case of error occurrence. - * @retval None - */ + * @brief This function is executed in case of error occurrence. + * @retval None + */ void Error_Handler(void) { - /* USER CODE BEGIN Error_Handler_Debug */ + /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) { } - /* USER CODE END Error_Handler_Debug */ + /* USER CODE END Error_Handler_Debug */ } #ifdef USE_FULL_ASSERT /** - * @brief Reports the name of the source file and the source line number - * where the assert_param error has occurred. - * @param file: pointer to the source file name - * @param line: assert_param error line source number - * @retval None - */ + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ void assert_failed(uint8_t *file, uint32_t line) { - /* USER CODE BEGIN 6 */ + /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ - /* USER CODE END 6 */ + /* USER CODE END 6 */ } #endif /* USE_FULL_ASSERT */ diff --git a/software/dumber3/Core/Src/messages.c b/software/dumber3/Core/Src/messages.c index 350623e..4920860 100644 --- a/software/dumber3/Core/Src/messages.c +++ b/software/dumber3/Core/Src/messages.c @@ -20,8 +20,6 @@ void MESSAGE_Init(void) { LEDS_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef)); MOTEURS_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef)); SEQUENCEUR_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef)); - BATTERIE_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef)); - XBEE_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef)); } MESSAGE_Typedef MESSAGE_ReadMailbox(QueueHandle_t mbx) { diff --git a/software/dumber3/Core/Src/sequenceur.c b/software/dumber3/Core/Src/sequenceur.c index c4d1b0a..8bfa8db 100644 --- a/software/dumber3/Core/Src/sequenceur.c +++ b/software/dumber3/Core/Src/sequenceur.c @@ -6,6 +6,9 @@ */ #include "sequenceur.h" +#include "timers.h" +#include "string.h" +#include StaticTask_t xTaskSequenceurMain; @@ -15,20 +18,45 @@ StaticTask_t xTaskSequenceurMain; StackType_t xStackSequenceurMain[ STACK_SIZE ]; TaskHandle_t xHandleSequenceurMain = NULL; -StaticTask_t xTaskSequenceurTimeout; - -/* Buffer that the task being created will use as its stack. Note this is - an array of StackType_t variables. The size of StackType_t is dependent on - the RTOS port. */ -StackType_t xStackSequenceurTimeout[ STACK_SIZE ]; -TaskHandle_t xHandleSequenceurTimeout = NULL; +StaticTimer_t xBufferTimerTimeout; +TimerHandle_t xHandleTimerTimeout = NULL; +void vTimerTimeoutCallback( TimerHandle_t xTimer ); void SEQUENCEUR_MainThread(void* params); void SEQUENCEUR_TimeoutThread(void* params); +void SEQUENCEUR_StateMachine(); +LEDS_State SEQUENCEUR_BatteryLevel(uint16_t voltage, char inCharge); +void SEQUENCEUR_PowerOff(); uint16_t SEQUENCEUR_CntTimeout; uint16_t SEQUENCEUR_CntPowerOff; +typedef enum { + stateStartup=0, + stateIdle, + stateRun, + stateInCharge, + stateInMouvement, + stateWatchdogDisable, + stateLowBatDisable +} SEQUENCEUR_State; + +typedef struct { + SEQUENCEUR_State state; + CMD_Type cmd; + uint16_t batteryVoltage; + char batteryUpdate; + char inCharge; + int32_t distance; + int32_t turns; + int32_t motor_left; + int32_t motor_right; + char endOfMouvement; + char powerOffRequired; +} SEQUENCEUR_Infos; + +SEQUENCEUR_Infos systemInfos = {0}; + void SEQUENCEUR_Init(void) { /* Create the task without using any dynamic memory allocation. */ xHandleSequenceurMain = xTaskCreateStatic( @@ -42,24 +70,192 @@ void SEQUENCEUR_Init(void) { vTaskResume(xHandleSequenceurMain); /* Create the task without using any dynamic memory allocation. */ - xHandleSequenceurTimeout = xTaskCreateStatic( - SEQUENCEUR_TimeoutThread, /* Function that implements the task. */ - "SEQUENCEUR Timeout", /* Text name for the task. */ - STACK_SIZE, /* Number of indexes in the xStack array. */ - NULL, /* Parameter passed into the task. */ - PrioritySequenceurTimeout,/* Priority at which the task is created. */ - xStackSequenceurTimeout, /* Array to use as the task's stack. */ - &xTaskSequenceurTimeout); /* Variable to hold the task's data structure. */ - vTaskResume(xHandleSequenceurTimeout); + + xHandleTimerTimeout = xTimerCreateStatic( + "Seq Timer", + //pdMS_TO_TICKS(100), + pdMS_TO_TICKS(2000), + pdTRUE, + ( void * ) 0, + vTimerTimeoutCallback, + &xBufferTimerTimeout); + xTimerStart(xHandleTimerTimeout,0 ); SEQUENCEUR_CntTimeout =0; SEQUENCEUR_CntPowerOff=0; } void SEQUENCEUR_MainThread(void* params) { + MESSAGE_Typedef msg; + + char *cmd; + CMD_Generic* decodedCmd; + + while (1) { + msg = MESSAGE_ReadMailbox(SEQUENCEUR_Mailbox); + + switch (msg.id) { + case MSG_ID_XBEE_CMD: + cmd = (char*)msg.data; + + if (cmdIsValid(cmd)!= okANS) + cmdSendAnswer(errANS); + else { + decodedCmd = cmdDecode(cmd); + + if (decodedCmd==CMD_DECODE_INVALID) + cmdSendAnswer(errANS); + else if (decodedCmd==CMD_DECODE_UNKNOWN) + cmdSendAnswer(unknownANS); + else { + systemInfos.cmd = decodedCmd->type; + if (decodedCmd->type == moveCMD) + systemInfos.distance = ((CMD_Move*)decodedCmd)->distance; + else if (decodedCmd->type == turnCMD) + systemInfos.turns = ((CMD_Turn*)decodedCmd)->turns; + else if (decodedCmd->type == setMotorCMD) { + systemInfos.motor_left = ((CMD_SetMotor*)decodedCmd)->motor_left; + systemInfos.motor_right = ((CMD_SetMotor*)decodedCmd)->motor_right; + } + + free(decodedCmd); + } + } + + free(cmd); + + break; + + case MSG_ID_BAT_NIVEAU: + case MSG_ID_BAT_CHARGE: + systemInfos.batteryVoltage = *((uint16_t*)msg.data); + systemInfos.batteryUpdate = 1; + + if (msg.id == MSG_ID_BAT_CHARGE) + systemInfos.inCharge =1; + else + systemInfos.inCharge =0; + break; + + case MSG_ID_BAT_CHARGEUR_ON: + case MSG_ID_BAT_CHARGEUR_OFF: + if (msg.id == MSG_ID_BAT_CHARGEUR_ON) + systemInfos.inCharge =1; + else + systemInfos.inCharge =0; + break; + + case MSG_ID_MOTEURS_ARRET: + systemInfos.endOfMouvement= 1; + break; + + case MSG_ID_BUTTON_PRESSED: + systemInfos.powerOffRequired =1; + break; + } + + SEQUENCEUR_StateMachine(); + } +} + +void SEQUENCEUR_StateMachine() { + LEDS_State ledState = leds_off; + + if (systemInfos.inCharge) { + systemInfos.state = stateInCharge; + } else if (systemInfos.batteryUpdate) { + ledState = SEQUENCEUR_BatteryLevel(systemInfos.batteryVoltage, systemInfos.inCharge); + + if (ledState == leds_niveau_bat_0) + systemInfos.state= stateLowBatDisable; + } + + switch (systemInfos.cmd) { // commands common to every state + case pingCMD: + break; + case getVersionCMD: + break; + case getBatteryVoltageCMD: + break; + case powerOffCMD: + break; + case resetCMD: + break; + case busyStateCMD: + break; + case testCMD: + break; + case debugCMD: + break; + default: // commands no common for every states + break; + } + + switch (systemInfos.state) { + case stateStartup: + if (systemInfos.batteryUpdate) { + ledState = SEQUENCEUR_BatteryLevel(systemInfos.batteryVoltage, systemInfos.inCharge); + MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&ledState); + + vTaskDelay(pdMS_TO_TICKS(2000)); // wait 2s + + systemInfos.state= stateIdle; + ledState = leds_idle; + MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&ledState); + } + break; + case stateIdle: + if (systemInfos.powerOffRequired) + SEQUENCEUR_PowerOff(); + break; + case stateRun: + if (systemInfos.powerOffRequired) + SEQUENCEUR_PowerOff(); + break; + case stateInCharge: + if (!systemInfos.inCharge) { + systemInfos.state = stateIdle; + ledState = leds_idle; + MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&ledState); + } else if (systemInfos.batteryUpdate) { + ledState = SEQUENCEUR_BatteryLevel(systemInfos.batteryVoltage, systemInfos.inCharge); + MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&ledState); + } + break; + case stateInMouvement: + if (systemInfos.powerOffRequired) + SEQUENCEUR_PowerOff(); + break; + case stateWatchdogDisable: + if (systemInfos.powerOffRequired) + SEQUENCEUR_PowerOff(); + break; + case stateLowBatDisable: + ledState = leds_charge_bat_0; + MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&ledState); + + vTaskDelay(pdMS_TO_TICKS(2000)); // wait 2s + + SEQUENCEUR_PowerOff(); + break; + } + + systemInfos.batteryUpdate = 0; + systemInfos.cmd =0; + systemInfos.endOfMouvement =0; + systemInfos.powerOffRequired=0; +} + +LEDS_State SEQUENCEUR_BatteryLevel(uint16_t voltage, char inCharge) { + LEDS_State ledState=leds_niveau_bat_0; + + return ledState; +} + +void SEQUENCEUR_PowerOff() { } -void SEQUENCEUR_TimeoutThread(void* params) { - +/* This task is called every 2s */ +void vTimerTimeoutCallback( TimerHandle_t xTimer ) { } diff --git a/software/dumber3/Core/Src/stm32l0xx_hal_msp.c b/software/dumber3/Core/Src/stm32l0xx_hal_msp.c index dba3fe5..b5240f3 100644 --- a/software/dumber3/Core/Src/stm32l0xx_hal_msp.c +++ b/software/dumber3/Core/Src/stm32l0xx_hal_msp.c @@ -24,6 +24,7 @@ /* USER CODE BEGIN Includes */ /* USER CODE END Includes */ +extern DMA_HandleTypeDef hdma_lpuart1_tx; /* Private typedef -----------------------------------------------------------*/ /* USER CODE BEGIN TD */ @@ -60,7 +61,7 @@ /* USER CODE END 0 */ void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); - /** + /** * Initializes the Global MSP. */ void HAL_MspInit(void) @@ -147,6 +148,56 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) } +/** +* @brief LPTIM MSP Initialization +* This function configures the hardware resources used in this example +* @param hlptim: LPTIM handle pointer +* @retval None +*/ +void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef* hlptim) +{ + if(hlptim->Instance==LPTIM1) + { + /* USER CODE BEGIN LPTIM1_MspInit 0 */ + + /* USER CODE END LPTIM1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_LPTIM1_CLK_ENABLE(); + /* LPTIM1 interrupt Init */ + HAL_NVIC_SetPriority(LPTIM1_IRQn, 3, 0); + HAL_NVIC_EnableIRQ(LPTIM1_IRQn); + /* USER CODE BEGIN LPTIM1_MspInit 1 */ + + /* USER CODE END LPTIM1_MspInit 1 */ + } + +} + +/** +* @brief LPTIM MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hlptim: LPTIM handle pointer +* @retval None +*/ +void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef* hlptim) +{ + if(hlptim->Instance==LPTIM1) + { + /* USER CODE BEGIN LPTIM1_MspDeInit 0 */ + + /* USER CODE END LPTIM1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_LPTIM1_CLK_DISABLE(); + + /* LPTIM1 interrupt DeInit */ + HAL_NVIC_DisableIRQ(LPTIM1_IRQn); + /* USER CODE BEGIN LPTIM1_MspDeInit 1 */ + + /* USER CODE END LPTIM1_MspDeInit 1 */ + } + +} + /** * @brief UART MSP Initialization * This function configures the hardware resources used in this example @@ -176,6 +227,24 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) GPIO_InitStruct.Alternate = GPIO_AF4_LPUART1; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + /* LPUART1 DMA Init */ + /* LPUART1_TX Init */ + hdma_lpuart1_tx.Instance = DMA1_Channel2; + hdma_lpuart1_tx.Init.Request = DMA_REQUEST_5; + hdma_lpuart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; + hdma_lpuart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_lpuart1_tx.Init.MemInc = DMA_MINC_ENABLE; + hdma_lpuart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_lpuart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_lpuart1_tx.Init.Mode = DMA_NORMAL; + hdma_lpuart1_tx.Init.Priority = DMA_PRIORITY_LOW; + if (HAL_DMA_Init(&hdma_lpuart1_tx) != HAL_OK) + { + Error_Handler(); + } + + __HAL_LINKDMA(huart,hdmatx,hdma_lpuart1_tx); + /* LPUART1 interrupt Init */ HAL_NVIC_SetPriority(LPUART1_IRQn, 3, 0); HAL_NVIC_EnableIRQ(LPUART1_IRQn); @@ -208,6 +277,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) */ HAL_GPIO_DeInit(GPIOB, USART_TX_Pin|USART_RX_Pin); + /* LPUART1 DMA DeInit */ + HAL_DMA_DeInit(huart->hdmatx); + /* LPUART1 interrupt DeInit */ HAL_NVIC_DisableIRQ(LPUART1_IRQn); /* USER CODE BEGIN LPUART1_MspDeInit 1 */ @@ -217,39 +289,6 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) } -/** -* @brief TIM_Base MSP Initialization -* This function configures the hardware resources used in this example -* @param htim_base: TIM_Base handle pointer -* @retval None -*/ -void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) -{ - if(htim_base->Instance==TIM2) - { - /* USER CODE BEGIN TIM2_MspInit 0 */ - - /* USER CODE END TIM2_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_TIM2_CLK_ENABLE(); - /* USER CODE BEGIN TIM2_MspInit 1 */ - - /* USER CODE END TIM2_MspInit 1 */ - } - else if(htim_base->Instance==TIM3) - { - /* USER CODE BEGIN TIM3_MspInit 0 */ - - /* USER CODE END TIM3_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_TIM3_CLK_ENABLE(); - /* USER CODE BEGIN TIM3_MspInit 1 */ - - /* USER CODE END TIM3_MspInit 1 */ - } - -} - /** * @brief TIM_Encoder MSP Initialization * This function configures the hardware resources used in this example @@ -259,7 +298,38 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder) { GPIO_InitTypeDef GPIO_InitStruct = {0}; - if(htim_encoder->Instance==TIM21) + if(htim_encoder->Instance==TIM2) + { + /* USER CODE BEGIN TIM2_MspInit 0 */ + + /* USER CODE END TIM2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM2_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**TIM2 GPIO Configuration + PA1 ------> TIM2_CH2 + PA5 ------> TIM2_CH1 + */ + GPIO_InitStruct.Pin = ENC_PHA_GAUCHE_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; + HAL_GPIO_Init(ENC_PHA_GAUCHE_GPIO_Port, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = ENC_PHB_GAUCHE_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF5_TIM2; + HAL_GPIO_Init(ENC_PHB_GAUCHE_GPIO_Port, &GPIO_InitStruct); + + /* USER CODE BEGIN TIM2_MspInit 1 */ + + /* USER CODE END TIM2_MspInit 1 */ + } + else if(htim_encoder->Instance==TIM21) { /* USER CODE BEGIN TIM21_MspInit 0 */ @@ -283,29 +353,27 @@ void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder) /* USER CODE END TIM21_MspInit 1 */ } - else if(htim_encoder->Instance==TIM22) + +} + +/** +* @brief TIM_Base MSP Initialization +* This function configures the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ +void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) +{ + if(htim_base->Instance==TIM3) { - /* USER CODE BEGIN TIM22_MspInit 0 */ + /* USER CODE BEGIN TIM3_MspInit 0 */ - /* USER CODE END TIM22_MspInit 0 */ + /* USER CODE END TIM3_MspInit 0 */ /* Peripheral clock enable */ - __HAL_RCC_TIM22_CLK_ENABLE(); + __HAL_RCC_TIM3_CLK_ENABLE(); + /* USER CODE BEGIN TIM3_MspInit 1 */ - __HAL_RCC_GPIOA_CLK_ENABLE(); - /**TIM22 GPIO Configuration - PA6 ------> TIM22_CH1 - PA7 ------> TIM22_CH2 - */ - GPIO_InitStruct.Pin = ENC_PHB_GAUCHE_Pin|ENC_PHA_GAUCHE_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.Alternate = GPIO_AF5_TIM22; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* USER CODE BEGIN TIM22_MspInit 1 */ - - /* USER CODE END TIM22_MspInit 1 */ + /* USER CODE END TIM3_MspInit 1 */ } } @@ -313,45 +381,27 @@ void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder) void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) { GPIO_InitTypeDef GPIO_InitStruct = {0}; - if(htim->Instance==TIM2) - { - /* USER CODE BEGIN TIM2_MspPostInit 0 */ - - /* USER CODE END TIM2_MspPostInit 0 */ - __HAL_RCC_GPIOA_CLK_ENABLE(); - /**TIM2 GPIO Configuration - PA1 ------> TIM2_CH2 - PA15 ------> TIM2_CH1 - */ - GPIO_InitStruct.Pin = PWM_B_GAUCHE_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF2_TIM2; - HAL_GPIO_Init(PWM_B_GAUCHE_GPIO_Port, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = PWM_A_GAUCHE_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF5_TIM2; - HAL_GPIO_Init(PWM_A_GAUCHE_GPIO_Port, &GPIO_InitStruct); - - /* USER CODE BEGIN TIM2_MspPostInit 1 */ - - /* USER CODE END TIM2_MspPostInit 1 */ - } - else if(htim->Instance==TIM3) + if(htim->Instance==TIM3) { /* USER CODE BEGIN TIM3_MspPostInit 0 */ /* USER CODE END TIM3_MspPostInit 0 */ + __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); /**TIM3 GPIO Configuration + PA6 ------> TIM3_CH1 + PA7 ------> TIM3_CH2 PB0 ------> TIM3_CH3 PB1 ------> TIM3_CH4 */ + GPIO_InitStruct.Pin = PWM_B_GAUCHE_Pin|PWM_A_GAUCHE_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + GPIO_InitStruct.Pin = PWM_A_DROIT_Pin|PWM_B_DROIT_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; @@ -365,39 +415,6 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) } } -/** -* @brief TIM_Base MSP De-Initialization -* This function freeze the hardware resources used in this example -* @param htim_base: TIM_Base handle pointer -* @retval None -*/ -void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) -{ - if(htim_base->Instance==TIM2) - { - /* USER CODE BEGIN TIM2_MspDeInit 0 */ - - /* USER CODE END TIM2_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_TIM2_CLK_DISABLE(); - /* USER CODE BEGIN TIM2_MspDeInit 1 */ - - /* USER CODE END TIM2_MspDeInit 1 */ - } - else if(htim_base->Instance==TIM3) - { - /* USER CODE BEGIN TIM3_MspDeInit 0 */ - - /* USER CODE END TIM3_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_TIM3_CLK_DISABLE(); - /* USER CODE BEGIN TIM3_MspDeInit 1 */ - - /* USER CODE END TIM3_MspDeInit 1 */ - } - -} - /** * @brief TIM_Encoder MSP De-Initialization * This function freeze the hardware resources used in this example @@ -406,7 +423,25 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) */ void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef* htim_encoder) { - if(htim_encoder->Instance==TIM21) + if(htim_encoder->Instance==TIM2) + { + /* USER CODE BEGIN TIM2_MspDeInit 0 */ + + /* USER CODE END TIM2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM2_CLK_DISABLE(); + + /**TIM2 GPIO Configuration + PA1 ------> TIM2_CH2 + PA5 ------> TIM2_CH1 + */ + HAL_GPIO_DeInit(GPIOA, ENC_PHA_GAUCHE_Pin|ENC_PHB_GAUCHE_Pin); + + /* USER CODE BEGIN TIM2_MspDeInit 1 */ + + /* USER CODE END TIM2_MspDeInit 1 */ + } + else if(htim_encoder->Instance==TIM21) { /* USER CODE BEGIN TIM21_MspDeInit 0 */ @@ -424,23 +459,27 @@ void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef* htim_encoder) /* USER CODE END TIM21_MspDeInit 1 */ } - else if(htim_encoder->Instance==TIM22) + +} + +/** +* @brief TIM_Base MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ +void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) +{ + if(htim_base->Instance==TIM3) { - /* USER CODE BEGIN TIM22_MspDeInit 0 */ + /* USER CODE BEGIN TIM3_MspDeInit 0 */ - /* USER CODE END TIM22_MspDeInit 0 */ + /* USER CODE END TIM3_MspDeInit 0 */ /* Peripheral clock disable */ - __HAL_RCC_TIM22_CLK_DISABLE(); + __HAL_RCC_TIM3_CLK_DISABLE(); + /* USER CODE BEGIN TIM3_MspDeInit 1 */ - /**TIM22 GPIO Configuration - PA6 ------> TIM22_CH1 - PA7 ------> TIM22_CH2 - */ - HAL_GPIO_DeInit(GPIOA, ENC_PHB_GAUCHE_Pin|ENC_PHA_GAUCHE_Pin); - - /* USER CODE BEGIN TIM22_MspDeInit 1 */ - - /* USER CODE END TIM22_MspDeInit 1 */ + /* USER CODE END TIM3_MspDeInit 1 */ } } diff --git a/software/dumber3/Core/Src/stm32l0xx_it.c b/software/dumber3/Core/Src/stm32l0xx_it.c index c11f3e3..f1d2bfc 100644 --- a/software/dumber3/Core/Src/stm32l0xx_it.c +++ b/software/dumber3/Core/Src/stm32l0xx_it.c @@ -59,6 +59,8 @@ /* External variables --------------------------------------------------------*/ extern ADC_HandleTypeDef hadc; +extern LPTIM_HandleTypeDef hlptim1; +extern DMA_HandleTypeDef hdma_lpuart1_tx; extern UART_HandleTypeDef hlpuart1; /* USER CODE BEGIN EV */ @@ -154,6 +156,20 @@ void EXTI4_15_IRQHandler(void) /* USER CODE END EXTI4_15_IRQn 1 */ } +/** + * @brief This function handles DMA1 channel 2 and channel 3 interrupts. + */ +void DMA1_Channel2_3_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */ + + /* USER CODE END DMA1_Channel2_3_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_lpuart1_tx); + /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */ + + /* USER CODE END DMA1_Channel2_3_IRQn 1 */ +} + /** * @brief This function handles ADC, COMP1 and COMP2 interrupts (COMP interrupts through EXTI lines 21 and 22). */ @@ -168,6 +184,20 @@ void ADC1_COMP_IRQHandler(void) /* USER CODE END ADC1_COMP_IRQn 1 */ } +/** + * @brief This function handles LPTIM1 global interrupt / LPTIM1 wake-up interrupt through EXTI line 29. + */ +void LPTIM1_IRQHandler(void) +{ + /* USER CODE BEGIN LPTIM1_IRQn 0 */ + + /* USER CODE END LPTIM1_IRQn 0 */ + HAL_LPTIM_IRQHandler(&hlptim1); + /* USER CODE BEGIN LPTIM1_IRQn 1 */ + + /* USER CODE END LPTIM1_IRQn 1 */ +} + /** * @brief This function handles LPUART1 global interrupt / LPUART1 wake-up interrupt through EXTI line 28. */ diff --git a/software/dumber3/Core/Src/syscalls.c b/software/dumber3/Core/Src/syscalls.c index bc0dd6c..5bbf955 100644 --- a/software/dumber3/Core/Src/syscalls.c +++ b/software/dumber3/Core/Src/syscalls.c @@ -31,6 +31,7 @@ #include #include +#include "cmsis_os.h" /* Variables */ extern int __io_putchar(int ch) __attribute__((weak)); @@ -42,6 +43,28 @@ char **environ = __env; /* Functions */ +void* malloc(size_t size) +{ + void* ptr = NULL; + + if(size > 0) + { + // We simply wrap the FreeRTOS call into a standard form + ptr = pvPortMalloc(size); + } // else NULL if there was an error + + return ptr; +} + +void free(void* ptr) +{ + if(ptr) + { + // We simply wrap the FreeRTOS call into a standard form + vPortFree(ptr); + } +} + void initialise_monitor_handles() { } diff --git a/software/dumber3/Core/Src/xbee.c b/software/dumber3/Core/Src/xbee.c index 9572fa0..2a4bc24 100644 --- a/software/dumber3/Core/Src/xbee.c +++ b/software/dumber3/Core/Src/xbee.c @@ -7,6 +7,12 @@ #include "xbee.h" +#include "semphr.h" +#include +#include + +extern UART_HandleTypeDef hlpuart1; +extern DMA_HandleTypeDef hdma_lpuart1_tx; StaticTask_t xTaskXbeeRX; @@ -16,45 +22,82 @@ StaticTask_t xTaskXbeeRX; StackType_t xStackXbeeRX[ STACK_SIZE ]; TaskHandle_t xHandleXbeeRX = NULL; -StaticTask_t xTaskXbeeTX; +SemaphoreHandle_t xSemaphoreTX = NULL; +StaticSemaphore_t xSemaphoreTXBuffer; -/* Buffer that the task being created will use as its stack. Note this is - an array of StackType_t variables. The size of StackType_t is dependent on - the RTOS port. */ -StackType_t xStackXbeeTX[ STACK_SIZE ]; -TaskHandle_t xHandleXbeeTX = NULL; +uint8_t* txBuffer; + +uint8_t* rxBuffer; +uint32_t rxBufferIndex; void XBEE_RxThread(void* params); -void XBEE_TxThread(void* params); void XBEE_Init(void) { - /* Create the task without using any dynamic memory allocation. */ - xHandleXbeeTX = xTaskCreateStatic( - XBEE_TxThread, /* Function that implements the task. */ - "XBEE Tx", /* Text name for the task. */ - STACK_SIZE, /* Number of indexes in the xStack array. */ - NULL, /* Parameter passed into the task. */ - PriorityXbeeTX,/* Priority at which the task is created. */ - xStackXbeeTX, /* Array to use as the task's stack. */ - &xTaskXbeeTX); /* Variable to hold the task's data structure. */ - vTaskResume(xHandleXbeeTX); + xSemaphoreTX = xSemaphoreCreateBinaryStatic( &xSemaphoreTXBuffer ); + xSemaphoreGive(xSemaphoreTX); - /* Create the task without using any dynamic memory allocation. */ - xHandleXbeeRX = xTaskCreateStatic( - XBEE_RxThread, /* Function that implements the task. */ - "XBEE Rx", /* Text name for the task. */ - STACK_SIZE, /* Number of indexes in the xStack array. */ - NULL, /* Parameter passed into the task. */ - PriorityXbeeRX,/* Priority at which the task is created. */ - xStackXbeeRX, /* Array to use as the task's stack. */ - &xTaskXbeeRX); /* Variable to hold the task's data structure. */ - vTaskResume(xHandleXbeeRX); + rxBuffer=(uint8_t*)malloc(XBEE_RX_BUFFER_MAX_LENGTH); + rxBufferIndex=0; + + if(HAL_UART_Receive_IT(&hlpuart1, rxBuffer, 1)!= HAL_OK) { + while(1); + } } -void XBEE_TxThread(void* params) { +int XBEE_SendData(char* data, int length) { + int data_length = length; + BaseType_t state; + state = xSemaphoreTake(xSemaphoreTX, pdMS_TO_TICKS(XBEE_TX_SEMAPHORE_WAIT)); // wait max 500 ms + + if (state != pdFALSE) { /* test semaphore take answer */ + if ((txBuffer = (uint8_t*)malloc(length))!=NULL) { + memcpy((void*)txBuffer, (void*) data, length); + + if(HAL_UART_Transmit_IT(&hlpuart1, txBuffer, data_length)!= HAL_OK) + return -3; + } else return -2; + } else return -1; + + return length; } -void XBEE_RxThread(void* params) { +void HAL_UART_TxCpltCallback(UART_HandleTypeDef *UartHandle) { + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + /* Do stuff here */ + free (txBuffer); + xSemaphoreGiveFromISR( xSemaphoreTX, &xHigherPriorityTaskWoken ); + + /* If xHigherPriorityTaskWoken was set to true you + we should yield. The actual macro used here is + port specific. */ + portYIELD_FROM_ISR(xHigherPriorityTaskWoken ); +} + +void HAL_UART_RxCpltCallback(UART_HandleTypeDef *UartHandle) { + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + + if (rxBuffer[rxBufferIndex] == '\r') { + rxBuffer[rxBufferIndex+1]=0; // add end of string + MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_XBEE_CMD, (QueueHandle_t)0x0, (void*)rxBuffer, &xHigherPriorityTaskWoken); + + rxBuffer = malloc(XBEE_RX_BUFFER_MAX_LENGTH); + rxBufferIndex=0; + } else if (rxBufferIndex>=XBEE_RX_BUFFER_MAX_LENGTH-2) // prevent buffer overflow + rxBufferIndex=0; + else + rxBufferIndex++; + + if(HAL_UART_Receive_IT(&hlpuart1, &rxBuffer[rxBufferIndex], 1)!= HAL_OK) { + while(1); + } + + if (xHigherPriorityTaskWoken) { + /* If xHigherPriorityTaskWoken is now set to pdTRUE then a context switch + should be performed to ensure the interrupt returns directly to the highest + priority task. The macro used for this purpose is dependent on the port in + use and may be called portEND_SWITCHING_ISR(). */ + portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); + } } diff --git a/software/dumber3/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h b/software/dumber3/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h new file mode 100644 index 0000000..0e55a52 --- /dev/null +++ b/software/dumber3/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_lptim.h @@ -0,0 +1,772 @@ +/** + ****************************************************************************** + * @file stm32l0xx_hal_lptim.h + * @author MCD Application Team + * @brief Header file of LPTIM HAL module. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32L0xx_HAL_LPTIM_H +#define STM32L0xx_HAL_LPTIM_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l0xx_hal_def.h" + +/** @addtogroup STM32L0xx_HAL_Driver + * @{ + */ + +#if defined (LPTIM1) + +/** @addtogroup LPTIM + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ +/** @defgroup LPTIM_Exported_Types LPTIM Exported Types + * @{ + */ +#define LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT EXTI_IMR_IM29 /*!< External interrupt line 29 Connected to the LPTIM EXTI Line */ + +/** + * @brief LPTIM Clock configuration definition + */ +typedef struct +{ + uint32_t Source; /*!< Selects the clock source. + This parameter can be a value of @ref LPTIM_Clock_Source */ + + uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. + This parameter can be a value of @ref LPTIM_Clock_Prescaler */ + +} LPTIM_ClockConfigTypeDef; + +/** + * @brief LPTIM Clock configuration definition + */ +typedef struct +{ + uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit + if the ULPTIM input is selected. + Note: This parameter is used only when Ultra low power clock source is used. + Note: If the polarity is configured on 'both edges', an auxiliary clock + (one of the Low power oscillator) must be active. + This parameter can be a value of @ref LPTIM_Clock_Polarity */ + + uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. + Note: This parameter is used only when Ultra low power clock source is used. + This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ + +} LPTIM_ULPClockConfigTypeDef; + +/** + * @brief LPTIM Trigger configuration definition + */ +typedef struct +{ + uint32_t Source; /*!< Selects the Trigger source. + This parameter can be a value of @ref LPTIM_Trigger_Source */ + + uint32_t ActiveEdge; /*!< Selects the Trigger active edge. + Note: This parameter is used only when an external trigger is used. + This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ + + uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. + Note: This parameter is used only when an external trigger is used. + This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ +} LPTIM_TriggerConfigTypeDef; + +/** + * @brief LPTIM Initialization Structure definition + */ +typedef struct +{ + LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ + + LPTIM_ULPClockConfigTypeDef UltraLowPowerClock;/*!< Specifies the Ultra Low Power clock parameters */ + + LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ + + uint32_t OutputPolarity; /*!< Specifies the Output polarity. + This parameter can be a value of @ref LPTIM_Output_Polarity */ + + uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare + values is done immediately or after the end of current period. + This parameter can be a value of @ref LPTIM_Updating_Mode */ + + uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event + or each external event. + This parameter can be a value of @ref LPTIM_Counter_Source */ +} LPTIM_InitTypeDef; + +/** + * @brief HAL LPTIM State structure definition + */ +typedef enum +{ + HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ + HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ + HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ + HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ + HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */ +} HAL_LPTIM_StateTypeDef; + +/** + * @brief LPTIM handle Structure definition + */ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) +typedef struct __LPTIM_HandleTypeDef +#else +typedef struct +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ +{ + LPTIM_TypeDef *Instance; /*!< Register base address */ + + LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ + + HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ + + HAL_LockTypeDef Lock; /*!< LPTIM locking object */ + + __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ + +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) + void (* MspInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp Init Callback */ + void (* MspDeInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp DeInit Callback */ + void (* CompareMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare match Callback */ + void (* AutoReloadMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload match Callback */ + void (* TriggerCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< External trigger event detection Callback */ + void (* CompareWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare register write complete Callback */ + void (* AutoReloadWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload register write complete Callback */ + void (* DirectionUpCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Up-counting direction change Callback */ + void (* DirectionDownCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Down-counting direction change Callback */ +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ +} LPTIM_HandleTypeDef; + +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) +/** + * @brief HAL LPTIM Callback ID enumeration definition + */ +typedef enum +{ + HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM Base Msp Init Callback ID */ + HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM Base Msp DeInit Callback ID */ + HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< Compare match Callback ID */ + HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U, /*!< Auto-reload match Callback ID */ + HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< External trigger event detection Callback ID */ + HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< Compare register write complete Callback ID */ + HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U, /*!< Auto-reload register write complete Callback ID */ + HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< Up-counting direction change Callback ID */ + HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< Down-counting direction change Callback ID */ +} HAL_LPTIM_CallbackIDTypeDef; + +/** + * @brief HAL TIM Callback pointer definition + */ +typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< pointer to the LPTIM callback function */ + +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants + * @{ + */ + +/** @defgroup LPTIM_Clock_Source LPTIM Clock Source + * @{ + */ +#define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00000000U +#define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL +/** + * @} + */ + +/** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler + * @{ + */ +#define LPTIM_PRESCALER_DIV1 0x00000000U +#define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 +#define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 +#define LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1) +#define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 +#define LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2) +#define LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2) +#define LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC +/** + * @} + */ + +/** @defgroup LPTIM_Output_Polarity LPTIM Output Polarity + * @{ + */ + +#define LPTIM_OUTPUTPOLARITY_HIGH 0x00000000U +#define LPTIM_OUTPUTPOLARITY_LOW LPTIM_CFGR_WAVPOL +/** + * @} + */ + +/** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time + * @{ + */ +#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U +#define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 +#define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 +#define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT +/** + * @} + */ + +/** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity + * @{ + */ +#define LPTIM_CLOCKPOLARITY_RISING 0x00000000U +#define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 +#define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 +/** + * @} + */ + +/** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source + * @{ + */ +#define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU +#define LPTIM_TRIGSOURCE_0 0x00000000U +#define LPTIM_TRIGSOURCE_1 LPTIM_CFGR_TRIGSEL_0 +#define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 +#define LPTIM_TRIGSOURCE_3 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) +#define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 +#define LPTIM_TRIGSOURCE_5 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2) +#define LPTIM_TRIGSOURCE_6 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2) +#define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL +/** + * @} + */ + +/** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity + * @{ + */ +#define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 +#define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 +#define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN +/** + * @} + */ + +/** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time + * @{ + */ +#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U +#define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 +#define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 +#define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT +/** + * @} + */ + +/** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode + * @{ + */ + +#define LPTIM_UPDATE_IMMEDIATE 0x00000000U +#define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD +/** + * @} + */ + +/** @defgroup LPTIM_Counter_Source LPTIM Counter Source + * @{ + */ + +#define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U +#define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE +/** + * @} + */ + +/** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition + * @{ + */ + +#define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN +#define LPTIM_FLAG_UP LPTIM_ISR_UP +#define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK +#define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK +#define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG +#define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM +#define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM +/** + * @} + */ + +/** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition + * @{ + */ +#define LPTIM_IT_DOWN LPTIM_IER_DOWNIE +#define LPTIM_IT_UP LPTIM_IER_UPIE +#define LPTIM_IT_ARROK LPTIM_IER_ARROKIE +#define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE +#define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE +#define LPTIM_IT_ARRM LPTIM_IER_ARRMIE +#define LPTIM_IT_CMPM LPTIM_IER_CMPMIE +/** + * @} + */ + +/** + * @} + */ + +/* Exported macros -----------------------------------------------------------*/ +/** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros + * @{ + */ + +/** @brief Reset LPTIM handle state. + * @param __HANDLE__ LPTIM handle + * @retval None + */ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) +#define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ + (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ + (__HANDLE__)->MspInitCallback = NULL; \ + (__HANDLE__)->MspDeInitCallback = NULL; \ + } while(0) +#else +#define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET) +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + +/** + * @brief Enable the LPTIM peripheral. + * @param __HANDLE__ LPTIM handle + * @retval None + */ +#define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) + +/** + * @brief Disable the LPTIM peripheral. + * @param __HANDLE__ LPTIM handle + * @note The following sequence is required to solve LPTIM disable HW limitation. + * Please check Errata Sheet ES0335 for more details under "MCU may remain + * stuck in LPTIM interrupt when entering Stop mode" section. + * @note Please call @ref HAL_LPTIM_GetState() after a call to __HAL_LPTIM_DISABLE to + * check for TIMEOUT. + * @retval None + */ +#define __HAL_LPTIM_DISABLE(__HANDLE__) LPTIM_Disable(__HANDLE__) + +/** + * @brief Start the LPTIM peripheral in Continuous mode. + * @param __HANDLE__ LPTIM handle + * @retval None + */ +#define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) +/** + * @brief Start the LPTIM peripheral in single mode. + * @param __HANDLE__ LPTIM handle + * @retval None + */ +#define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) + +/** + * @brief Write the passed parameter in the Autoreload register. + * @param __HANDLE__ LPTIM handle + * @param __VALUE__ Autoreload value + * @retval None + * @note The ARR register can only be modified when the LPTIM instance is enabled. + */ +#define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) + +/** + * @brief Write the passed parameter in the Compare register. + * @param __HANDLE__ LPTIM handle + * @param __VALUE__ Compare value + * @retval None + * @note The CMP register can only be modified when the LPTIM instance is enabled. + */ +#define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__)) + +/** + * @brief Check whether the specified LPTIM flag is set or not. + * @param __HANDLE__ LPTIM handle + * @param __FLAG__ LPTIM flag to check + * This parameter can be a value of: + * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. + * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. + * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. + * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. + * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. + * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. + * @arg LPTIM_FLAG_CMPM : Compare match Flag. + * @retval The state of the specified flag (SET or RESET). + */ +#define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) + +/** + * @brief Clear the specified LPTIM flag. + * @param __HANDLE__ LPTIM handle. + * @param __FLAG__ LPTIM flag to clear. + * This parameter can be a value of: + * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. + * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. + * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. + * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. + * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. + * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. + * @arg LPTIM_FLAG_CMPM : Compare match Flag. + * @retval None. + */ +#define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) + +/** + * @brief Enable the specified LPTIM interrupt. + * @param __HANDLE__ LPTIM handle. + * @param __INTERRUPT__ LPTIM interrupt to set. + * This parameter can be a value of: + * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. + * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. + * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. + * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. + * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. + * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. + * @arg LPTIM_IT_CMPM : Compare match Interrupt. + * @retval None. + * @note The LPTIM interrupts can only be enabled when the LPTIM instance is disabled. + */ +#define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) + +/** + * @brief Disable the specified LPTIM interrupt. + * @param __HANDLE__ LPTIM handle. + * @param __INTERRUPT__ LPTIM interrupt to set. + * This parameter can be a value of: + * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. + * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. + * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. + * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. + * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. + * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. + * @arg LPTIM_IT_CMPM : Compare match Interrupt. + * @retval None. + * @note The LPTIM interrupts can only be disabled when the LPTIM instance is disabled. + */ +#define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) + +/** + * @brief Check whether the specified LPTIM interrupt source is enabled or not. + * @param __HANDLE__ LPTIM handle. + * @param __INTERRUPT__ LPTIM interrupt to check. + * This parameter can be a value of: + * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. + * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. + * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. + * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. + * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. + * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. + * @arg LPTIM_IT_CMPM : Compare match Interrupt. + * @retval Interrupt status. + */ + +#define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER\ + & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) + +/** + * @brief Enable interrupt on the LPTIM Wake-up Timer associated Exti line. + * @retval None + */ +#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR\ + |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) + +/** + * @brief Disable interrupt on the LPTIM Wake-up Timer associated Exti line. + * @retval None + */ +#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR\ + &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) + +/** + * @brief Enable event on the LPTIM Wake-up Timer associated Exti line. + * @retval None. + */ +#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR\ + |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT) + +/** + * @brief Disable event on the LPTIM Wake-up Timer associated Exti line. + * @retval None. + */ +#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR\ + &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions + * @{ + */ + +/** @addtogroup LPTIM_Exported_Functions_Group1 + * @brief Initialization and Configuration functions. + * @{ + */ +/* Initialization/de-initialization functions ********************************/ +HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); +HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); + +/* MSP functions *************************************************************/ +void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); +void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); +/** + * @} + */ + +/** @addtogroup LPTIM_Exported_Functions_Group2 + * @brief Start-Stop operation functions. + * @{ + */ +/* Start/Stop operation functions *********************************************/ +/* ################################# PWM Mode ################################*/ +/* Blocking mode: Polling */ +HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); +HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim); +/* Non-Blocking mode: Interrupt */ +HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); +HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim); + +/* ############################# One Pulse Mode ##############################*/ +/* Blocking mode: Polling */ +HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); +HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim); +/* Non-Blocking mode: Interrupt */ +HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); +HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim); + +/* ############################## Set once Mode ##############################*/ +/* Blocking mode: Polling */ +HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); +HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim); +/* Non-Blocking mode: Interrupt */ +HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); +HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim); + +/* ############################### Encoder Mode ##############################*/ +/* Blocking mode: Polling */ +HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); +HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); +/* Non-Blocking mode: Interrupt */ +HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); +HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); + +/* ############################# Time out Mode ##############################*/ +/* Blocking mode: Polling */ +HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); +HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); +/* Non-Blocking mode: Interrupt */ +HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); +HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); + +/* ############################## Counter Mode ###############################*/ +/* Blocking mode: Polling */ +HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); +HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); +/* Non-Blocking mode: Interrupt */ +HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); +HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); +/** + * @} + */ + +/** @addtogroup LPTIM_Exported_Functions_Group3 + * @brief Read operation functions. + * @{ + */ +/* Reading operation functions ************************************************/ +uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim); +uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim); +uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim); +/** + * @} + */ + +/** @addtogroup LPTIM_Exported_Functions_Group4 + * @brief LPTIM IRQ handler and callback functions. + * @{ + */ +/* LPTIM IRQ functions *******************************************************/ +void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); + +/* CallBack functions ********************************************************/ +void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); +void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); +void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); +void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); +void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); +void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); +void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); + +/* Callbacks Register/UnRegister functions ***********************************/ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) +HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID, + pLPTIM_CallbackTypeDef pCallback); +HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID); +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ +/** + * @} + */ + +/** @addtogroup LPTIM_Group5 + * @brief Peripheral State functions. + * @{ + */ +/* Peripheral State functions ************************************************/ +HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim); +/** + * @} + */ + +/** + * @} + */ + +/* Private types -------------------------------------------------------------*/ +/** @defgroup LPTIM_Private_Types LPTIM Private Types + * @{ + */ + +/** + * @} + */ + +/* Private variables ---------------------------------------------------------*/ +/** @defgroup LPTIM_Private_Variables LPTIM Private Variables + * @{ + */ + +/** + * @} + */ + +/* Private constants ---------------------------------------------------------*/ +/** @defgroup LPTIM_Private_Constants LPTIM Private Constants + * @{ + */ + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/** @defgroup LPTIM_Private_Macros LPTIM Private Macros + * @{ + */ + +#define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ + ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) + + +#define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ + ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \ + ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \ + ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \ + ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \ + ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \ + ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \ + ((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) + +#define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) + +#define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \ + ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH)) + +#define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ + ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \ + ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \ + ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) + +#define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ + ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \ + ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) + +#define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ + ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \ + ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \ + ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \ + ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \ + ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \ + ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \ + ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \ + ((__TRIG__) == LPTIM_TRIGSOURCE_7)) + +#define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \ + ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \ + ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) + +#define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \ + ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \ + ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \ + ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) + +#define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ + ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) + +#define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ + ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) + +#define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFFUL) + +#define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL) + +#define IS_LPTIM_PERIOD(__PERIOD__) ((__PERIOD__) <= 0x0000FFFFUL) + +#define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFUL) + +/** + * @} + */ + +/* Private functions ---------------------------------------------------------*/ +/** @defgroup LPTIM_Private_Functions LPTIM Private Functions + * @{ + */ +void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim); +/** + * @} + */ + +/** + * @} + */ + +#endif /* LPTIM1 */ +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32L0xx_HAL_LPTIM_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/software/dumber3/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lptim.c b/software/dumber3/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lptim.c new file mode 100644 index 0000000..267580f --- /dev/null +++ b/software/dumber3/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_lptim.c @@ -0,0 +1,2457 @@ +/** + ****************************************************************************** + * @file stm32l0xx_hal_lptim.c + * @author MCD Application Team + * @brief LPTIM HAL module driver. + * This file provides firmware functions to manage the following + * functionalities of the Low Power Timer (LPTIM) peripheral: + * + Initialization and de-initialization functions. + * + Start/Stop operation functions in polling mode. + * + Start/Stop operation functions in interrupt mode. + * + Reading operation functions. + * + Peripheral State functions. + * + @verbatim + ============================================================================== + ##### How to use this driver ##### + ============================================================================== + [..] + The LPTIM HAL driver can be used as follows: + + (#)Initialize the LPTIM low level resources by implementing the + HAL_LPTIM_MspInit(): + (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE(). + (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()): + (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority(). + (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ(). + (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler(). + + (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function + configures mainly: + (++) The instance: LPTIM1. + (++) Clock: the counter clock. + (+++) Source : it can be either the ULPTIM input (IN1) or one of + the internal clock; (APB, LSE, LSI or MSI). + (+++) Prescaler: select the clock divider. + (++) UltraLowPowerClock : To be used only if the ULPTIM is selected + as counter clock source. + (+++) Polarity: polarity of the active edge for the counter unit + if the ULPTIM input is selected. + (+++) SampleTime: clock sampling time to configure the clock glitch + filter. + (++) Trigger: How the counter start. + (+++) Source: trigger can be software or one of the hardware triggers. + (+++) ActiveEdge : only for hardware trigger. + (+++) SampleTime : trigger sampling time to configure the trigger + glitch filter. + (++) OutputPolarity : 2 opposite polarities are possible. + (++) UpdateMode: specifies whether the update of the autoreload and + the compare values is done immediately or after the end of current + period. + + (#)Six modes are available: + + (++) PWM Mode: To generate a PWM signal with specified period and pulse, + call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption + mode. + + (++) One Pulse Mode: To generate pulse with specified width in response + to a stimulus, call HAL_LPTIM_OnePulse_Start() or + HAL_LPTIM_OnePulse_Start_IT() for interruption mode. + + (++) Set once Mode: In this mode, the output changes the level (from + low level to high level if the output polarity is configured high, else + the opposite) when a compare match occurs. To start this mode, call + HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for + interruption mode. + + (++) Encoder Mode: To use the encoder interface call + HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for + interruption mode. Only available for LPTIM1 instance. + + (++) Time out Mode: an active edge on one selected trigger input rests + the counter. The first trigger event will start the timer, any + successive trigger event will reset the counter and the timer will + restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or + HAL_LPTIM_TimeOut_Start_IT() for interruption mode. + + (++) Counter Mode: counter can be used to count external events on + the LPTIM Input1 or it can be used to count internal clock cycles. + To start this mode, call HAL_LPTIM_Counter_Start() or + HAL_LPTIM_Counter_Start_IT() for interruption mode. + + + (#) User can stop any process by calling the corresponding API: + HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is + already started in interruption mode. + + (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit(). + + *** Callback registration *** + ============================================= + [..] + The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1 + allows the user to configure dynamically the driver callbacks. + [..] + Use Function HAL_LPTIM_RegisterCallback() to register a callback. + HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle, + the Callback ID and a pointer to the user callback function. + [..] + Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the + default weak function. + HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle, + and the Callback ID. + [..] + These functions allow to register/unregister following callbacks: + + (+) MspInitCallback : LPTIM Base Msp Init Callback. + (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback. + (+) CompareMatchCallback : Compare match Callback. + (+) AutoReloadMatchCallback : Auto-reload match Callback. + (+) TriggerCallback : External trigger event detection Callback. + (+) CompareWriteCallback : Compare register write complete Callback. + (+) AutoReloadWriteCallback : Auto-reload register write complete Callback. + (+) DirectionUpCallback : Up-counting direction change Callback. + (+) DirectionDownCallback : Down-counting direction change Callback. + + [..] + By default, after the Init and when the state is HAL_LPTIM_STATE_RESET + all interrupt callbacks are set to the corresponding weak functions: + examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback(). + + [..] + Exception done for MspInit and MspDeInit functions that are reset to the legacy weak + functionalities in the Init/DeInit only when these callbacks are null + (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit + keep and use the user MspInit/MspDeInit callbacks (registered beforehand) + + [..] + Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only. + Exception done MspInit/MspDeInit that can be registered/unregistered + in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state, + thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + In that case first register the MspInit/MspDeInit user callbacks + using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function. + + [..] + When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or + not defined, the callback registration feature is not available and all callbacks + are set to the corresponding weak functions. + + @endverbatim + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l0xx_hal.h" + +/** @addtogroup STM32L0xx_HAL_Driver + * @{ + */ + +/** @defgroup LPTIM LPTIM + * @brief LPTIM HAL module driver. + * @{ + */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + +#if defined (LPTIM1) + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/** @addtogroup LPTIM_Private_Constants + * @{ + */ +#define TIMEOUT 1000UL /* Timeout is 1s */ +/** + * @} + */ + +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) +static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim); +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ +static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag); + +/* Exported functions --------------------------------------------------------*/ + +/** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions + * @{ + */ + +/** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions + * @brief Initialization and Configuration functions. + * +@verbatim + ============================================================================== + ##### Initialization and de-initialization functions ##### + ============================================================================== + [..] This section provides functions allowing to: + (+) Initialize the LPTIM according to the specified parameters in the + LPTIM_InitTypeDef and initialize the associated handle. + (+) DeInitialize the LPTIM peripheral. + (+) Initialize the LPTIM MSP. + (+) DeInitialize the LPTIM MSP. + +@endverbatim + * @{ + */ + +/** + * @brief Initialize the LPTIM according to the specified parameters in the + * LPTIM_InitTypeDef and initialize the associated handle. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim) +{ + uint32_t tmpcfgr; + + /* Check the LPTIM handle allocation */ + if (hlptim == NULL) + { + return HAL_ERROR; + } + + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source)); + assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler)); + if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM) + || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) + { + assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity)); + assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime)); + } + assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source)); + if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE) + { + assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge)); + assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime)); + } + assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity)); + assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode)); + assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource)); + + if (hlptim->State == HAL_LPTIM_STATE_RESET) + { + /* Allocate lock resource and initialize it */ + hlptim->Lock = HAL_UNLOCKED; + +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) + /* Reset interrupt callbacks to legacy weak callbacks */ + LPTIM_ResetCallback(hlptim); + + if (hlptim->MspInitCallback == NULL) + { + hlptim->MspInitCallback = HAL_LPTIM_MspInit; + } + + /* Init the low level hardware : GPIO, CLOCK, NVIC */ + hlptim->MspInitCallback(hlptim); +#else + /* Init the low level hardware : GPIO, CLOCK, NVIC */ + HAL_LPTIM_MspInit(hlptim); +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + } + + /* Change the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Get the LPTIMx CFGR value */ + tmpcfgr = hlptim->Instance->CFGR; + + if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM) + || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) + { + tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT)); + } + if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE) + { + tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL)); + } + + /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */ + tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD | + LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE)); + + /* Set initialization parameters */ + tmpcfgr |= (hlptim->Init.Clock.Source | + hlptim->Init.Clock.Prescaler | + hlptim->Init.OutputPolarity | + hlptim->Init.UpdateMode | + hlptim->Init.CounterSource); + + /* Glitch filters for internal triggers and external inputs are configured + * only if an internal clock source is provided to the LPTIM + */ + if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC) + { + tmpcfgr |= (hlptim->Init.Trigger.SampleTime | + hlptim->Init.UltraLowPowerClock.SampleTime); + } + + /* Configure LPTIM external clock polarity and digital filter */ + if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM) + || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) + { + tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity | + hlptim->Init.UltraLowPowerClock.SampleTime); + } + + /* Configure LPTIM external trigger */ + if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE) + { + /* Enable External trigger and set the trigger source */ + tmpcfgr |= (hlptim->Init.Trigger.Source | + hlptim->Init.Trigger.ActiveEdge | + hlptim->Init.Trigger.SampleTime); + } + + /* Write to LPTIMx CFGR */ + hlptim->Instance->CFGR = tmpcfgr; + + /* Change the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief DeInitialize the LPTIM peripheral. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the LPTIM handle allocation */ + if (hlptim == NULL) + { + return HAL_ERROR; + } + + /* Change the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable the LPTIM Peripheral Clock */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) + if (hlptim->MspDeInitCallback == NULL) + { + hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; + } + + /* DeInit the low level hardware: CLOCK, NVIC.*/ + hlptim->MspDeInitCallback(hlptim); +#else + /* DeInit the low level hardware: CLOCK, NVIC.*/ + HAL_LPTIM_MspDeInit(hlptim); +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + + /* Change the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_RESET; + + /* Release Lock */ + __HAL_UNLOCK(hlptim); + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Initialize the LPTIM MSP. + * @param hlptim LPTIM handle + * @retval None + */ +__weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hlptim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_LPTIM_MspInit could be implemented in the user file + */ +} + +/** + * @brief DeInitialize LPTIM MSP. + * @param hlptim LPTIM handle + * @retval None + */ +__weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hlptim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_LPTIM_MspDeInit could be implemented in the user file + */ +} + +/** + * @} + */ + +/** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions + * @brief Start-Stop operation functions. + * +@verbatim + ============================================================================== + ##### LPTIM Start Stop operation functions ##### + ============================================================================== + [..] This section provides functions allowing to: + (+) Start the PWM mode. + (+) Stop the PWM mode. + (+) Start the One pulse mode. + (+) Stop the One pulse mode. + (+) Start the Set once mode. + (+) Stop the Set once mode. + (+) Start the Encoder mode. + (+) Stop the Encoder mode. + (+) Start the Timeout mode. + (+) Stop the Timeout mode. + (+) Start the Counter mode. + (+) Stop the Counter mode. + + +@endverbatim + * @{ + */ + +/** + * @brief Start the LPTIM PWM generation. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @param Pulse Specifies the compare value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + assert_param(IS_LPTIM_PULSE(Pulse)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Reset WAVE bit to set PWM mode */ + hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE; + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK); + + /* Load the pulse value in the compare register */ + __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); + + /* Wait for the completion of the write operation to the LPTIM_CMP register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Start timer in continuous mode */ + __HAL_LPTIM_START_CONTINUOUS(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the LPTIM PWM generation. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Change the LPTIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Start the LPTIM PWM generation in interrupt mode. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF + * @param Pulse Specifies the compare value. + * This parameter must be a value between 0x0000 and 0xFFFF + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + assert_param(IS_LPTIM_PULSE(Pulse)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Reset WAVE bit to set PWM mode */ + hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE; + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK); + + /* Load the pulse value in the compare register */ + __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); + + /* Wait for the completion of the write operation to the LPTIM_CMP register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Enable Autoreload write complete interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK); + + /* Enable Compare write complete interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK); + + /* Enable Autoreload match interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM); + + /* Enable Compare match interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM); + + /* If external trigger source is used, then enable external trigger interrupt */ + if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) + { + /* Enable external trigger interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG); + } + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Start timer in continuous mode */ + __HAL_LPTIM_START_CONTINUOUS(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the LPTIM PWM generation in interrupt mode. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Disable Autoreload write complete interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK); + + /* Disable Compare write complete interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK); + + /* Disable Autoreload match interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM); + + /* Disable Compare match interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM); + + /* If external trigger source is used, then disable external trigger interrupt */ + if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) + { + /* Disable external trigger interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG); + } + + /* Change the LPTIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Start the LPTIM One pulse generation. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @param Pulse Specifies the compare value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + assert_param(IS_LPTIM_PULSE(Pulse)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Reset WAVE bit to set one pulse mode */ + hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE; + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK); + + /* Load the pulse value in the compare register */ + __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); + + /* Wait for the completion of the write operation to the LPTIM_CMP register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Start timer in single (one shot) mode */ + __HAL_LPTIM_START_SINGLE(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the LPTIM One pulse generation. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Change the LPTIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Start the LPTIM One pulse generation in interrupt mode. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @param Pulse Specifies the compare value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + assert_param(IS_LPTIM_PULSE(Pulse)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Reset WAVE bit to set one pulse mode */ + hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE; + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK); + + /* Load the pulse value in the compare register */ + __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); + + /* Wait for the completion of the write operation to the LPTIM_CMP register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Enable Autoreload write complete interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK); + + /* Enable Compare write complete interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK); + + /* Enable Autoreload match interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM); + + /* Enable Compare match interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM); + + /* If external trigger source is used, then enable external trigger interrupt */ + if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) + { + /* Enable external trigger interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG); + } + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Start timer in single (one shot) mode */ + __HAL_LPTIM_START_SINGLE(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the LPTIM One pulse generation in interrupt mode. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Disable Autoreload write complete interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK); + + /* Disable Compare write complete interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK); + + /* Disable Autoreload match interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM); + + /* Disable Compare match interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM); + + /* If external trigger source is used, then disable external trigger interrupt */ + if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) + { + /* Disable external trigger interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG); + } + + /* Change the LPTIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Start the LPTIM in Set once mode. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @param Pulse Specifies the compare value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + assert_param(IS_LPTIM_PULSE(Pulse)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Set WAVE bit to enable the set once mode */ + hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE; + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK); + + /* Load the pulse value in the compare register */ + __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); + + /* Wait for the completion of the write operation to the LPTIM_CMP register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Start timer in single (one shot) mode */ + __HAL_LPTIM_START_SINGLE(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the LPTIM Set once mode. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Change the LPTIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Start the LPTIM Set once mode in interrupt mode. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @param Pulse Specifies the compare value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + assert_param(IS_LPTIM_PULSE(Pulse)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Set WAVE bit to enable the set once mode */ + hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE; + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK); + + /* Load the pulse value in the compare register */ + __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); + + /* Wait for the completion of the write operation to the LPTIM_CMP register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Enable Autoreload write complete interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK); + + /* Enable Compare write complete interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK); + + /* Enable Autoreload match interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM); + + /* Enable Compare match interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM); + + /* If external trigger source is used, then enable external trigger interrupt */ + if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) + { + /* Enable external trigger interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG); + } + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Start timer in single (one shot) mode */ + __HAL_LPTIM_START_SINGLE(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the LPTIM Set once mode in interrupt mode. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Disable Autoreload write complete interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK); + + /* Disable Compare write complete interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK); + + /* Disable Autoreload match interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM); + + /* Disable Compare match interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM); + + /* If external trigger source is used, then disable external trigger interrupt */ + if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) + { + /* Disable external trigger interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG); + } + + /* Change the LPTIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Start the Encoder interface. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period) +{ + uint32_t tmpcfgr; + + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC); + assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1); + assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Get the LPTIMx CFGR value */ + tmpcfgr = hlptim->Instance->CFGR; + + /* Clear CKPOL bits */ + tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL); + + /* Set Input polarity */ + tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity; + + /* Write to LPTIMx CFGR */ + hlptim->Instance->CFGR = tmpcfgr; + + /* Set ENC bit to enable the encoder interface */ + hlptim->Instance->CFGR |= LPTIM_CFGR_ENC; + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Start timer in continuous mode */ + __HAL_LPTIM_START_CONTINUOUS(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the Encoder interface. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Reset ENC bit to disable the encoder interface */ + hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC; + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Start the Encoder interface in interrupt mode. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period) +{ + uint32_t tmpcfgr; + + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC); + assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1); + assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Configure edge sensitivity for encoder mode */ + /* Get the LPTIMx CFGR value */ + tmpcfgr = hlptim->Instance->CFGR; + + /* Clear CKPOL bits */ + tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL); + + /* Set Input polarity */ + tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity; + + /* Write to LPTIMx CFGR */ + hlptim->Instance->CFGR = tmpcfgr; + + /* Set ENC bit to enable the encoder interface */ + hlptim->Instance->CFGR |= LPTIM_CFGR_ENC; + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Enable "switch to down direction" interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN); + + /* Enable "switch to up direction" interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP); + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Start timer in continuous mode */ + __HAL_LPTIM_START_CONTINUOUS(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the Encoder interface in interrupt mode. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Reset ENC bit to disable the encoder interface */ + hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC; + + /* Disable "switch to down direction" interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN); + + /* Disable "switch to up direction" interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Start the Timeout function. + * @note The first trigger event will start the timer, any successive + * trigger event will reset the counter and the timer restarts. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @param Timeout Specifies the TimeOut value to reset the counter. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + assert_param(IS_LPTIM_PULSE(Timeout)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Set TIMOUT bit to enable the timeout function */ + hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT; + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK); + + /* Load the Timeout value in the compare register */ + __HAL_LPTIM_COMPARE_SET(hlptim, Timeout); + + /* Wait for the completion of the write operation to the LPTIM_CMP register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Start timer in continuous mode */ + __HAL_LPTIM_START_CONTINUOUS(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the Timeout function. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Reset TIMOUT bit to enable the timeout function */ + hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT; + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Start the Timeout function in interrupt mode. + * @note The first trigger event will start the timer, any successive + * trigger event will reset the counter and the timer restarts. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @param Timeout Specifies the TimeOut value to reset the counter. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + assert_param(IS_LPTIM_PULSE(Timeout)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */ + __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(); + + /* Set TIMOUT bit to enable the timeout function */ + hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT; + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK); + + /* Load the Timeout value in the compare register */ + __HAL_LPTIM_COMPARE_SET(hlptim, Timeout); + + /* Wait for the completion of the write operation to the LPTIM_CMP register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Enable Compare match interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM); + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Start timer in continuous mode */ + __HAL_LPTIM_START_CONTINUOUS(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the Timeout function in interrupt mode. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */ + __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(); + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Reset TIMOUT bit to enable the timeout function */ + hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT; + + /* Disable Compare match interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Start the Counter mode. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */ + if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) + && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) + { + /* Check if clock is prescaled */ + assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler)); + /* Set clock prescaler to 0 */ + hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC; + } + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Start timer in continuous mode */ + __HAL_LPTIM_START_CONTINUOUS(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the Counter mode. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Start the Counter mode in interrupt mode. + * @param hlptim LPTIM handle + * @param Period Specifies the Autoreload value. + * This parameter must be a value between 0x0000 and 0xFFFF. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + assert_param(IS_LPTIM_PERIOD(Period)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */ + __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(); + + /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */ + if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) + && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) + { + /* Check if clock is prescaled */ + assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler)); + /* Set clock prescaler to 0 */ + hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC; + } + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Clear flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Load the period value in the autoreload register */ + __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Enable Autoreload write complete interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK); + + /* Enable Autoreload match interrupt */ + __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM); + + /* Enable the Peripheral */ + __HAL_LPTIM_ENABLE(hlptim); + + /* Start timer in continuous mode */ + __HAL_LPTIM_START_CONTINUOUS(hlptim); + + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @brief Stop the Counter mode in interrupt mode. + * @param hlptim LPTIM handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + /* Set the LPTIM state */ + hlptim->State = HAL_LPTIM_STATE_BUSY; + + /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */ + __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(); + + /* Disable the Peripheral */ + __HAL_LPTIM_DISABLE(hlptim); + + if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT) + { + return HAL_TIMEOUT; + } + + /* Disable Autoreload write complete interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK); + + /* Disable Autoreload match interrupt */ + __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM); + /* Change the TIM state*/ + hlptim->State = HAL_LPTIM_STATE_READY; + + /* Return function status */ + return HAL_OK; +} + +/** + * @} + */ + +/** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions + * @brief Read operation functions. + * +@verbatim + ============================================================================== + ##### LPTIM Read operation functions ##### + ============================================================================== +[..] This section provides LPTIM Reading functions. + (+) Read the counter value. + (+) Read the period (Auto-reload) value. + (+) Read the pulse (Compare)value. +@endverbatim + * @{ + */ + +/** + * @brief Return the current counter value. + * @param hlptim LPTIM handle + * @retval Counter value. + */ +uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + return (hlptim->Instance->CNT); +} + +/** + * @brief Return the current Autoreload (Period) value. + * @param hlptim LPTIM handle + * @retval Autoreload value. + */ +uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + return (hlptim->Instance->ARR); +} + +/** + * @brief Return the current Compare (Pulse) value. + * @param hlptim LPTIM handle + * @retval Compare value. + */ +uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim) +{ + /* Check the parameters */ + assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); + + return (hlptim->Instance->CMP); +} + +/** + * @} + */ + +/** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks + * @brief LPTIM IRQ handler. + * +@verbatim + ============================================================================== + ##### LPTIM IRQ handler and callbacks ##### + ============================================================================== +[..] This section provides LPTIM IRQ handler and callback functions called within + the IRQ handler: + (+) LPTIM interrupt request handler + (+) Compare match Callback + (+) Auto-reload match Callback + (+) External trigger event detection Callback + (+) Compare register write complete Callback + (+) Auto-reload register write complete Callback + (+) Up-counting direction change Callback + (+) Down-counting direction change Callback + +@endverbatim + * @{ + */ + +/** + * @brief Handle LPTIM interrupt request. + * @param hlptim LPTIM handle + * @retval None + */ +void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim) +{ + /* Compare match interrupt */ + if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET) + { + if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET) + { + /* Clear Compare match flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM); + + /* Compare match Callback */ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) + hlptim->CompareMatchCallback(hlptim); +#else + HAL_LPTIM_CompareMatchCallback(hlptim); +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + } + } + + /* Autoreload match interrupt */ + if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET) + { + if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET) + { + /* Clear Autoreload match flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM); + + /* Autoreload match Callback */ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) + hlptim->AutoReloadMatchCallback(hlptim); +#else + HAL_LPTIM_AutoReloadMatchCallback(hlptim); +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + } + } + + /* Trigger detected interrupt */ + if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET) + { + if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET) + { + /* Clear Trigger detected flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG); + + /* Trigger detected callback */ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) + hlptim->TriggerCallback(hlptim); +#else + HAL_LPTIM_TriggerCallback(hlptim); +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + } + } + + /* Compare write interrupt */ + if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET) + { + if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET) + { + /* Clear Compare write flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK); + + /* Compare write Callback */ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) + hlptim->CompareWriteCallback(hlptim); +#else + HAL_LPTIM_CompareWriteCallback(hlptim); +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + } + } + + /* Autoreload write interrupt */ + if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET) + { + if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET) + { + /* Clear Autoreload write flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + + /* Autoreload write Callback */ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) + hlptim->AutoReloadWriteCallback(hlptim); +#else + HAL_LPTIM_AutoReloadWriteCallback(hlptim); +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + } + } + + /* Direction counter changed from Down to Up interrupt */ + if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET) + { + if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET) + { + /* Clear Direction counter changed from Down to Up flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP); + + /* Direction counter changed from Down to Up Callback */ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) + hlptim->DirectionUpCallback(hlptim); +#else + HAL_LPTIM_DirectionUpCallback(hlptim); +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + } + } + + /* Direction counter changed from Up to Down interrupt */ + if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET) + { + if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET) + { + /* Clear Direction counter changed from Up to Down flag */ + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN); + + /* Direction counter changed from Up to Down Callback */ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) + hlptim->DirectionDownCallback(hlptim); +#else + HAL_LPTIM_DirectionDownCallback(hlptim); +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + } + } +} + +/** + * @brief Compare match callback in non-blocking mode. + * @param hlptim LPTIM handle + * @retval None + */ +__weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hlptim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_LPTIM_CompareMatchCallback could be implemented in the user file + */ +} + +/** + * @brief Autoreload match callback in non-blocking mode. + * @param hlptim LPTIM handle + * @retval None + */ +__weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hlptim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file + */ +} + +/** + * @brief Trigger detected callback in non-blocking mode. + * @param hlptim LPTIM handle + * @retval None + */ +__weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hlptim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_LPTIM_TriggerCallback could be implemented in the user file + */ +} + +/** + * @brief Compare write callback in non-blocking mode. + * @param hlptim LPTIM handle + * @retval None + */ +__weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hlptim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_LPTIM_CompareWriteCallback could be implemented in the user file + */ +} + +/** + * @brief Autoreload write callback in non-blocking mode. + * @param hlptim LPTIM handle + * @retval None + */ +__weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hlptim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file + */ +} + +/** + * @brief Direction counter changed from Down to Up callback in non-blocking mode. + * @param hlptim LPTIM handle + * @retval None + */ +__weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hlptim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_LPTIM_DirectionUpCallback could be implemented in the user file + */ +} + +/** + * @brief Direction counter changed from Up to Down callback in non-blocking mode. + * @param hlptim LPTIM handle + * @retval None + */ +__weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hlptim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_LPTIM_DirectionDownCallback could be implemented in the user file + */ +} + +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) +/** + * @brief Register a User LPTIM callback to be used instead of the weak predefined callback + * @param hlptim LPTIM handle + * @param CallbackID ID of the callback to be registered + * This parameter can be one of the following values: + * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID + * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID + * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID + * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID + * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID + * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID + * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID + * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID + * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID + * @param pCallback pointer to the callback function + * @retval status + */ +HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim, + HAL_LPTIM_CallbackIDTypeDef CallbackID, + pLPTIM_CallbackTypeDef pCallback) +{ + HAL_StatusTypeDef status = HAL_OK; + + if (pCallback == NULL) + { + return HAL_ERROR; + } + + /* Process locked */ + __HAL_LOCK(hlptim); + + if (hlptim->State == HAL_LPTIM_STATE_READY) + { + switch (CallbackID) + { + case HAL_LPTIM_MSPINIT_CB_ID : + hlptim->MspInitCallback = pCallback; + break; + + case HAL_LPTIM_MSPDEINIT_CB_ID : + hlptim->MspDeInitCallback = pCallback; + break; + + case HAL_LPTIM_COMPARE_MATCH_CB_ID : + hlptim->CompareMatchCallback = pCallback; + break; + + case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID : + hlptim->AutoReloadMatchCallback = pCallback; + break; + + case HAL_LPTIM_TRIGGER_CB_ID : + hlptim->TriggerCallback = pCallback; + break; + + case HAL_LPTIM_COMPARE_WRITE_CB_ID : + hlptim->CompareWriteCallback = pCallback; + break; + + case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID : + hlptim->AutoReloadWriteCallback = pCallback; + break; + + case HAL_LPTIM_DIRECTION_UP_CB_ID : + hlptim->DirectionUpCallback = pCallback; + break; + + case HAL_LPTIM_DIRECTION_DOWN_CB_ID : + hlptim->DirectionDownCallback = pCallback; + break; + + default : + /* Return error status */ + status = HAL_ERROR; + break; + } + } + else if (hlptim->State == HAL_LPTIM_STATE_RESET) + { + switch (CallbackID) + { + case HAL_LPTIM_MSPINIT_CB_ID : + hlptim->MspInitCallback = pCallback; + break; + + case HAL_LPTIM_MSPDEINIT_CB_ID : + hlptim->MspDeInitCallback = pCallback; + break; + + default : + /* Return error status */ + status = HAL_ERROR; + break; + } + } + else + { + /* Return error status */ + status = HAL_ERROR; + } + + /* Release Lock */ + __HAL_UNLOCK(hlptim); + + return status; +} + +/** + * @brief Unregister a LPTIM callback + * LLPTIM callback is redirected to the weak predefined callback + * @param hlptim LPTIM handle + * @param CallbackID ID of the callback to be unregistered + * This parameter can be one of the following values: + * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID + * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID + * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID + * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID + * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID + * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID + * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID + * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID + * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID + * @retval status + */ +HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim, + HAL_LPTIM_CallbackIDTypeDef CallbackID) +{ + HAL_StatusTypeDef status = HAL_OK; + + /* Process locked */ + __HAL_LOCK(hlptim); + + if (hlptim->State == HAL_LPTIM_STATE_READY) + { + switch (CallbackID) + { + case HAL_LPTIM_MSPINIT_CB_ID : + /* Legacy weak MspInit Callback */ + hlptim->MspInitCallback = HAL_LPTIM_MspInit; + break; + + case HAL_LPTIM_MSPDEINIT_CB_ID : + /* Legacy weak Msp DeInit Callback */ + hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; + break; + + case HAL_LPTIM_COMPARE_MATCH_CB_ID : + /* Legacy weak Compare match Callback */ + hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; + break; + + case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID : + /* Legacy weak Auto-reload match Callback */ + hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; + break; + + case HAL_LPTIM_TRIGGER_CB_ID : + /* Legacy weak External trigger event detection Callback */ + hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; + break; + + case HAL_LPTIM_COMPARE_WRITE_CB_ID : + /* Legacy weak Compare register write complete Callback */ + hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; + break; + + case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID : + /* Legacy weak Auto-reload register write complete Callback */ + hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; + break; + + case HAL_LPTIM_DIRECTION_UP_CB_ID : + /* Legacy weak Up-counting direction change Callback */ + hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; + break; + + case HAL_LPTIM_DIRECTION_DOWN_CB_ID : + /* Legacy weak Down-counting direction change Callback */ + hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; + break; + + default : + /* Return error status */ + status = HAL_ERROR; + break; + } + } + else if (hlptim->State == HAL_LPTIM_STATE_RESET) + { + switch (CallbackID) + { + case HAL_LPTIM_MSPINIT_CB_ID : + /* Legacy weak MspInit Callback */ + hlptim->MspInitCallback = HAL_LPTIM_MspInit; + break; + + case HAL_LPTIM_MSPDEINIT_CB_ID : + /* Legacy weak Msp DeInit Callback */ + hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; + break; + + default : + /* Return error status */ + status = HAL_ERROR; + break; + } + } + else + { + /* Return error status */ + status = HAL_ERROR; + } + + /* Release Lock */ + __HAL_UNLOCK(hlptim); + + return status; +} +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + +/** + * @} + */ + +/** @defgroup LPTIM_Group5 Peripheral State functions + * @brief Peripheral State functions. + * +@verbatim + ============================================================================== + ##### Peripheral State functions ##### + ============================================================================== + [..] + This subsection permits to get in run-time the status of the peripheral. + +@endverbatim + * @{ + */ + +/** + * @brief Return the LPTIM handle state. + * @param hlptim LPTIM handle + * @retval HAL state + */ +HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim) +{ + /* Return LPTIM handle state */ + return hlptim->State; +} + +/** + * @} + */ + + +/** + * @} + */ + +/* Private functions ---------------------------------------------------------*/ + +/** @defgroup LPTIM_Private_Functions LPTIM Private Functions + * @{ + */ +#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) +/** + * @brief Reset interrupt callbacks to the legacy weak callbacks. + * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains + * the configuration information for LPTIM module. + * @retval None + */ +static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim) +{ + /* Reset the LPTIM callback to the legacy weak callbacks */ + lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; + lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; + lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; + lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; + lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; + lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; + lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; +} +#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ + +/** + * @brief LPTimer Wait for flag set + * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains + * the configuration information for LPTIM module. + * @param flag The lptim flag + * @retval HAL status + */ +static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag) +{ + HAL_StatusTypeDef result = HAL_OK; + uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL); + do + { + count--; + if (count == 0UL) + { + result = HAL_TIMEOUT; + } + } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL)); + + return result; +} + +/** + * @brief Disable LPTIM HW instance. + * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains + * the configuration information for LPTIM module. + * @note The following sequence is required to solve LPTIM disable HW limitation. + * Please check Errata Sheet ES0335 for more details under "MCU may remain + * stuck in LPTIM interrupt when entering Stop mode" section. + * @retval None + */ +void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim) +{ + uint32_t tmpclksource = 0; + uint32_t tmpIER; + uint32_t tmpCFGR; + uint32_t tmpCMP; + uint32_t tmpARR; + + __disable_irq(); + + /*********** Save LPTIM Config ***********/ + /* Save LPTIM source clock */ + switch ((uint32_t)hlptim->Instance) + { + case LPTIM1_BASE: + tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE(); + break; + default: + break; + } + + /* Save LPTIM configuration registers */ + tmpIER = hlptim->Instance->IER; + tmpCFGR = hlptim->Instance->CFGR; + tmpCMP = hlptim->Instance->CMP; + tmpARR = hlptim->Instance->ARR; + + /*********** Reset LPTIM ***********/ + switch ((uint32_t)hlptim->Instance) + { + case LPTIM1_BASE: + __HAL_RCC_LPTIM1_FORCE_RESET(); + __HAL_RCC_LPTIM1_RELEASE_RESET(); + break; + default: + break; + } + + /*********** Restore LPTIM Config ***********/ + if ((tmpCMP != 0UL) || (tmpARR != 0UL)) + { + /* Force LPTIM source kernel clock from APB */ + switch ((uint32_t)hlptim->Instance) + { + case LPTIM1_BASE: + __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1); + break; + default: + break; + } + + if (tmpCMP != 0UL) + { + /* Restore CMP register (LPTIM should be enabled first) */ + hlptim->Instance->CR |= LPTIM_CR_ENABLE; + hlptim->Instance->CMP = tmpCMP; + + /* Wait for the completion of the write operation to the LPTIM_CMP register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT) + { + hlptim->State = HAL_LPTIM_STATE_TIMEOUT; + } + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK); + } + + if (tmpARR != 0UL) + { + /* Restore ARR register (LPTIM should be enabled first) */ + hlptim->Instance->CR |= LPTIM_CR_ENABLE; + hlptim->Instance->ARR = tmpARR; + + /* Wait for the completion of the write operation to the LPTIM_ARR register */ + if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT) + { + hlptim->State = HAL_LPTIM_STATE_TIMEOUT; + } + + __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); + } + + /* Restore LPTIM source kernel clock */ + switch ((uint32_t)hlptim->Instance) + { + case LPTIM1_BASE: + __HAL_RCC_LPTIM1_CONFIG(tmpclksource); + break; + default: + break; + } + } + + /* Restore configuration registers (LPTIM should be disabled first) */ + hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE); + hlptim->Instance->IER = tmpIER; + hlptim->Instance->CFGR = tmpCFGR; + + __enable_irq(); +} +/** + * @} + */ +#endif /* LPTIM1 */ + +#endif /* HAL_LPTIM_MODULE_ENABLED */ +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/software/dumber3/Dumber3.ioc b/software/dumber3/Dumber3.ioc index 2104f25..26e2092 100644 --- a/software/dumber3/Dumber3.ioc +++ b/software/dumber3/Dumber3.ioc @@ -2,6 +2,17 @@ ADC.IPParameters=SamplingTime,Resolution ADC.Resolution=ADC_RESOLUTION_8B ADC.SamplingTime=ADC_SAMPLETIME_160CYCLES_5 +Dma.LPUART1_TX.0.Direction=DMA_MEMORY_TO_PERIPH +Dma.LPUART1_TX.0.Instance=DMA1_Channel2 +Dma.LPUART1_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.LPUART1_TX.0.MemInc=DMA_MINC_ENABLE +Dma.LPUART1_TX.0.Mode=DMA_NORMAL +Dma.LPUART1_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.LPUART1_TX.0.PeriphInc=DMA_PINC_DISABLE +Dma.LPUART1_TX.0.Priority=DMA_PRIORITY_LOW +Dma.LPUART1_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority +Dma.Request0=LPUART1_TX +Dma.RequestsNb=1 FREERTOS.INCLUDE_pcTaskGetTaskName=1 FREERTOS.INCLUDE_xEventGroupSetBitFromISR=1 FREERTOS.INCLUDE_xTaskAbortDelay=1 @@ -20,28 +31,29 @@ LPUART1.IPParameters=BaudRate,WordLength LPUART1.WordLength=UART_WORDLENGTH_8B Mcu.Family=STM32L0 Mcu.IP0=ADC -Mcu.IP1=FREERTOS -Mcu.IP2=LPUART1 -Mcu.IP3=NVIC -Mcu.IP4=RCC -Mcu.IP5=SYS -Mcu.IP6=TIM2 -Mcu.IP7=TIM3 -Mcu.IP8=TIM21 -Mcu.IP9=TIM22 -Mcu.IPNb=10 +Mcu.IP1=DMA +Mcu.IP10=TIM21 +Mcu.IP2=FREERTOS +Mcu.IP3=LPTIM1 +Mcu.IP4=LPUART1 +Mcu.IP5=NVIC +Mcu.IP6=RCC +Mcu.IP7=SYS +Mcu.IP8=TIM2 +Mcu.IP9=TIM3 +Mcu.IPNb=11 Mcu.Name=STM32L071C(B-Z)Tx Mcu.Package=LQFP48 Mcu.Pin0=PA0 Mcu.Pin1=PA1 -Mcu.Pin10=PB12 -Mcu.Pin11=PB13 -Mcu.Pin12=PB14 -Mcu.Pin13=PB15 -Mcu.Pin14=PA10 -Mcu.Pin15=PA13 -Mcu.Pin16=PA14 -Mcu.Pin17=PA15 +Mcu.Pin10=PB11 +Mcu.Pin11=PB12 +Mcu.Pin12=PB13 +Mcu.Pin13=PB14 +Mcu.Pin14=PB15 +Mcu.Pin15=PA10 +Mcu.Pin16=PA13 +Mcu.Pin17=PA14 Mcu.Pin18=PB3 Mcu.Pin19=PB4 Mcu.Pin2=PA2 @@ -50,16 +62,16 @@ Mcu.Pin21=PB7 Mcu.Pin22=PB8 Mcu.Pin23=PB9 Mcu.Pin24=VP_FREERTOS_VS_CMSIS_V2 -Mcu.Pin25=VP_SYS_VS_Systick -Mcu.Pin26=VP_TIM2_VS_ClockSourceINT +Mcu.Pin25=VP_LPTIM1_VS_LPTIM_counterModeInternalClock +Mcu.Pin26=VP_SYS_VS_Systick Mcu.Pin27=VP_TIM3_VS_ClockSourceINT Mcu.Pin3=PA3 -Mcu.Pin4=PA6 -Mcu.Pin5=PA7 -Mcu.Pin6=PB0 -Mcu.Pin7=PB1 -Mcu.Pin8=PB10 -Mcu.Pin9=PB11 +Mcu.Pin4=PA5 +Mcu.Pin5=PA6 +Mcu.Pin6=PA7 +Mcu.Pin7=PB0 +Mcu.Pin8=PB1 +Mcu.Pin9=PB10 Mcu.PinsNb=28 Mcu.ThirdPartyNb=0 Mcu.UserConstants= @@ -67,10 +79,12 @@ Mcu.UserName=STM32L071CBTx MxCube.Version=6.3.0 MxDb.Version=DB.6.0.30 NVIC.ADC1_COMP_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true +NVIC.DMA1_Channel2_3_IRQn=true\:3\:0\:false\:false\:true\:true\:false\:true NVIC.EXTI2_3_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true NVIC.EXTI4_15_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true NVIC.ForceEnableDMAVector=true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.LPTIM1_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true NVIC.LPUART1_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.PendSV_IRQn=true\:3\:0\:false\:false\:false\:true\:false\:false @@ -83,9 +97,9 @@ PA0.GPIOParameters=GPIO_Label PA0.GPIO_Label=BATTERY_SENSE PA0.Mode=IN0 PA0.Signal=ADC_IN0 -PA1.GPIOParameters=GPIO_Speed,GPIO_Label -PA1.GPIO_Label=PWM_B_GAUCHE -PA1.GPIO_Speed=GPIO_SPEED_FREQ_HIGH +PA1.GPIOParameters=GPIO_Label +PA1.GPIO_Label=ENC_PHA_GAUCHE +PA1.Locked=true PA1.Signal=S_TIM2_CH2 PA10.GPIOParameters=GPIO_Label PA10.GPIO_Label=XBEE_RESET @@ -95,11 +109,6 @@ PA13.Mode=Serial_Wire PA13.Signal=SYS_SWDIO PA14.Mode=Serial_Wire PA14.Signal=SYS_SWCLK -PA15.GPIOParameters=GPIO_Speed,GPIO_Label -PA15.GPIO_Label=PWM_A_GAUCHE -PA15.GPIO_Speed=GPIO_SPEED_FREQ_HIGH -PA15.Locked=true -PA15.Signal=S_TIM2_CH1 PA2.GPIOParameters=GPIO_Label PA2.GPIO_Label=ENC_PHA_DROIT PA2.Locked=true @@ -108,12 +117,18 @@ PA3.GPIOParameters=GPIO_Label PA3.GPIO_Label=ENC_PHB_DROIT PA3.Locked=true PA3.Signal=S_TIM21_CH2 +PA5.GPIOParameters=GPIO_Label +PA5.GPIO_Label=ENC_PHB_GAUCHE +PA5.Locked=true +PA5.Signal=S_TIM2_CH1 PA6.GPIOParameters=GPIO_Label -PA6.GPIO_Label=ENC_PHB_GAUCHE -PA6.Signal=S_TIM22_CH1 +PA6.GPIO_Label=PWM_B_GAUCHE +PA6.Locked=true +PA6.Signal=S_TIM3_CH1 PA7.GPIOParameters=GPIO_Label -PA7.GPIO_Label=ENC_PHA_GAUCHE -PA7.Signal=S_TIM22_CH2 +PA7.GPIO_Label=PWM_A_GAUCHE +PA7.Locked=true +PA7.Signal=S_TIM3_CH2 PB0.GPIOParameters=GPIO_Speed,GPIO_Label PB0.GPIO_Label=PWM_A_DROIT PB0.GPIO_Speed=GPIO_SPEED_FREQ_HIGH @@ -210,7 +225,7 @@ ProjectManager.StackSize=0x200 ProjectManager.TargetToolchain=STM32CubeIDE ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ADC_Init-ADC-false-HAL-true,4-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_TIM21_Init-TIM21-false-HAL-true,8-MX_TIM22_Init-TIM22-false-HAL-true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ADC_Init-ADC-false-HAL-true,4-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_TIM21_Init-TIM21-false-HAL-true,8-MX_DMA_Init-DMA-false-HAL-true RCC.ADCFreq_Value=4000000 RCC.AHBFreq_Value=6000000 RCC.APB1Freq_Value=6000000 @@ -254,30 +269,29 @@ SH.S_TIM21_CH1.0=TIM21_CH1,Encoder_Interface SH.S_TIM21_CH1.ConfNb=1 SH.S_TIM21_CH2.0=TIM21_CH2,Encoder_Interface SH.S_TIM21_CH2.ConfNb=1 -SH.S_TIM22_CH1.0=TIM22_CH1,Encoder_Interface -SH.S_TIM22_CH1.ConfNb=1 -SH.S_TIM22_CH2.0=TIM22_CH2,Encoder_Interface -SH.S_TIM22_CH2.ConfNb=1 -SH.S_TIM2_CH1.0=TIM2_CH1,PWM Generation1 CH1 +SH.S_TIM2_CH1.0=TIM2_CH1,Encoder_Interface SH.S_TIM2_CH1.ConfNb=1 -SH.S_TIM2_CH2.0=TIM2_CH2,PWM Generation2 CH2 +SH.S_TIM2_CH2.0=TIM2_CH2,Encoder_Interface SH.S_TIM2_CH2.ConfNb=1 +SH.S_TIM3_CH1.0=TIM3_CH1,PWM Generation1 CH1 +SH.S_TIM3_CH1.ConfNb=1 +SH.S_TIM3_CH2.0=TIM3_CH2,PWM Generation2 CH2 +SH.S_TIM3_CH2.ConfNb=1 SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3 SH.S_TIM3_CH3.ConfNb=1 SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4 SH.S_TIM3_CH4.ConfNb=1 -TIM2.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 -TIM2.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2 -TIM2.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2 +TIM3.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 +TIM3.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2 TIM3.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 -TIM3.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4 +TIM3.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4,Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2 VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2 VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2 +VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00 +VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Signal=LPTIM1_VS_LPTIM_counterModeInternalClock VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick -VP_TIM2_VS_ClockSourceINT.Mode=Internal -VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT VP_TIM3_VS_ClockSourceINT.Mode=Internal VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT board=custom