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https://github.com/Lemonochrme/vhdl_processor.git
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86 lines
2.8 KiB
VHDL
86 lines
2.8 KiB
VHDL
library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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entity alu is
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port(
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a: in STD_LOGIC_VECTOR(7 downto 0);
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b: in STD_LOGIC_VECTOR(7 downto 0);
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op: in STD_LOGIC_VECTOR(2 downto 0);
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s: out STD_LOGIC_VECTOR(7 downto 0);
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flags : out STD_LOGIC_VECTOR(3 downto 0)
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);
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end alu;
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-- Flags
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-- C -> Carry (bit 0)
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-- N -> Negative (bit 1)
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-- Z -> Zero (bit 2)
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-- O -> Overflow (when using MUL) (bit 3)
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-- Operation Bits (OP2, OP1, OP0) Operation
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-- 000 ADD
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-- 001 SUB
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-- 010 AND
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-- 011 OR
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-- 100 XOR
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-- 101 NOT (return 0x1 if true, else return 0x0)
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-- 110 MUL
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architecture behavior_alu of alu is
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-- Internal variables
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shared variable buffer_s_16 : STD_LOGIC_VECTOR(15 downto 0);
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shared variable buffer_s : STD_LOGIC_VECTOR(7 downto 0);
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shared variable carry_s : STD_LOGIC_VECTOR(8 downto 0);
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shared variable buffer_flags : STD_LOGIC_VECTOR(3 downto 0);
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begin
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process(a, b, op) is
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begin
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buffer_flags := "0000";
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case op is
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when "000" =>
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-- calculcating a + b by concatening 8 bits to 9 bits and checking the MSB
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carry_s := ('0' & a) + ('0' & b);
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buffer_s := carry_s(7 downto 0);
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buffer_flags(0) := carry_s(8);
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-- Checking negative
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if (SIGNED(buffer_s) < (0)) then
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buffer_flags(1) := '1';
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end if;
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when "001" =>
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carry_s := ('0' & a) - ('0' & b);
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buffer_s := carry_s(7 downto 0);
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-- borrowing when negative
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buffer_flags(1) := carry_s(8);
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when "010" =>
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buffer_s := a AND b;
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when "011" =>
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buffer_s := a OR b;
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when "100" =>
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buffer_s := a XOR b;
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when "101" =>
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buffer_s := NOT a;
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when "110" =>
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buffer_s_16 := (a * b);
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buffer_s := buffer_s_16(7 downto 0);
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-- In the context of a multiplication overflow can be interpreted in two manners
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-- A basic overflow for both signed/unsigned. A negative flag for signed.
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if (buffer_s_16 > X"FF") then
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buffer_flags(3) := '1';
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end if;
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when others =>
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buffer_s := "00000000";
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end case;
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-- checking for 0 value
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if (buffer_s = 0) then
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buffer_flags(2) := '1';
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end if;
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-- Writing from the buffer to the output
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s <= buffer_s;
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flags <= buffer_flags;
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end process;
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end behavior_alu;
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