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vezde
parent
840748461a
commit
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23 changed files with 4535 additions and 689 deletions
1
doc/Flowchart-robot.drawio
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1
doc/Flowchart-robot.drawio
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@ -0,0 +1 @@
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<mxfile host="app.diagrams.net" modified="2022-10-11T12:40:49.574Z" agent="5.0 (X11)" etag="YNnbMm92YCTksZ5bMFh4" version="20.4.0" type="device"><diagram name="Page-1" id="c7558073-3199-34d8-9f00-42111426c3f3">7V1hc6I4GP41fnQHCKB8rNrd25n2zmlnbm8/7VCJyhwSD7Da/fWXSBBIsKKSBGw7s10IIcCb93ny5H0D7YHxavctctfLR+TBoGdo3q4HJj3D0DXLwf+Rkre0ZODYacEi8j1aKS949n/D7ExauvE9GJcqJggFib8uF85QGMJZUipzowhty9XmKChfde0uIFfwPHMDvvSH7yXLtHRo2Hn5H9BfLLMr6zZ94Bd39u8iQpuQXi9EIUyPrNysGfqM8dL10LZQBO57YBwhlKRbq90YBsSsmcXS874eOXq45QiGSZ0TprE/fRkZ3//2np7A/Z/OaDw1+1k/vbrBhtriOXGjZLOmN528ZTbaPyUkjek9MNou/QQ+r90ZObrFXoHLlskqoIdpqzBK4O7o/eoHK2DHgmgFk+gNV6EnAJMajvqUbtH9bd5DembcZaF3bFrmUqdYHJrOrYM3qIHOMdaAM1bPsAN82ZHnv+LNBdmcoi2McK2/wuwgvljheMUpWdFLxJa041TGE7CpMDDhaS9w43WK1rm/I54zmvtBMEYBivYNAW3/05C7OGV3Aby3VDmLIcxZhpyzfPewBamJ47Ublqxq/7chTJCatB+nNr0jJohg2jW0QqGzsAmdcrelzR7pN9UIBhV9IhnBDtcpT5uwdYayDNWG0jWNd1/isOOlGy2gcosN2zY26JpeZ3D44SazpYcWuOLEj92XANusHunKtrDN+KRhqjexwZn4AW1HblKyZrs80x6qNxs4S7bM5+0SHx2XPE1AkZE2w4rhQaq20TV+HOVNFnp3ZGqG92aBG8f+rGypHJhEAcKdn/xDtr9YdO8nrUe2J7tCtclbthPihymcRHZ/Fo/lp+33svPSW4UeNydkOgQ/DtpEM1hjSpCQUTE5OdHiuziCgZv4r+U7qeoweuoU+WFSUA4G4xpMl6cPQE8qTg6ZdswT7aTPx7Wz957D01zhUDovNyrgm4qPEyzFuiHu5gf3BQbE5WDs/ybDBHWEIm4DfxESV8UugK8ARgSx/swN7uiBle8R+Z5dgUYiaGO9A9ZOAP09OF3hHNehWa+SLs2guYDlHNndRzOVx43D2bCagTPbjl4Tz7iL3bdCtTWpEB+/X50RiWYpBIU30gYb5gpeBr7PFUcDMR2kCv2IVLjS8UzGP9B8HkNBVF8lRz+kdrDraoehGO3gOPjZS3M8/UK+4ZsCbFPCFYTJudUE24fYCcTdhDpQqwoscTg1LgKqoQypw7pIvVbI1YaX0xhSTbaphrQBGDDaYChFHPAJrQpxsM9x4Vo/yL/JN/x7FZOYHLm7urGEQhtfy82oERsRSrCPIVLWdzRBlGQJ8e8+G6kQKT/4JN4jSlAUU6WoOHzIpgJaED/U+UzWhx0InJoDAXWz5kcCmyHVSxWbeaoh4XqtKoTIkWwKzV/jlfcByFWMzO+zPSuQXI2qMF4jVKH3LookKWOKQwJV2exONVOcrRe16piVWL1oVMU+P0zgubAQrVHKsc1SV/aBRAqqig4KoCDjfQ5qXHS0lyAGDHAtYMmVEgYfUSyss4C7tR9VLAzoBD4NIV3P9Hyf6S+R6BQXVLpEIOgldZBHgmXog2yds6rMsWp90JxP8SGfJ7h34HTG0EXcXxtnuW7Gb1QtdJY/hh7L0egSYarXTwmLycwpx+m5Op6VA7ZjMR4pRMfzQapb0QBiIkl9xh0GQJ4IELh6bFAMKGp16WWgil9qBxRvNUrQmFOBqtATN5HPhMHjbYcSDTFTRomRRCBuTVrXOKK+Bml7pEA9SVQFh44lHfahvgsSw/chFhoa2p/8ukpumWeAGM0rMR0MWpfcbP1yNPoejniaYRclXkwzbEOCVr8CKctfQa3E6QN2V0Pbvxt1M9kKIEYDs92Yr3iQwD+mpLX3A3npCjkzFUu7kB041A4kpyvMWiLkFgFsCgqRyZMLprjF62fkL5pEq5wpQ2NotSzJUwaTX1degGYXQXjtsnL1IPxMIp6fnZCj2S/GOavZuYaE45zPInYc52pziKawHOJlr3mpA2n22YoaIBVEzapBeu3EeghkTKxNPhSUvUFmdvMNMlNQ6vAw2B8WEEkc/GUlD2sSSxeWEH0SS7Y2AagglgwdpW9puTNseD956yaxqP1ghSUsaHbOawYNQrntMTPLrsZN0/hkr5M9gGB81grIFSF7Vj5w/2WtXyjPJt5MPM8SE8/rM18v6eu2vBXKlrAIn/5F04YlfrEBeF9k4J0pjHz8UKRvP1rsj2UDy2LyMqJjAhYf+/skhlrE0LDepA6QQVEGDQiLMWIa0AdtogFZ7yo3xgMDNj8rnAdqfVTikweOoKjTPCAujFniADA8nwNa8H5E7S/jiPpinvK1idfGNg0przlbfGyz/IE80eRSWI0oaC2iJWYUyyaH2VvpDcxE8G7+Zz/S6vmfVQH3/wM=</diagram></mxfile>
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@ -10,5 +10,4 @@
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void BATTERIE_Init(void);
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void BATTERIE_Init(void);
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#endif /* INC_BATTERIE_H_ */
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#endif /* INC_BATTERIE_H_ */
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70
software/dumber3/Core/Inc/cmd.h
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70
software/dumber3/Core/Inc/cmd.h
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/*
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* cmd.h
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*
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* Created on: 3 oct. 2022
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* Author: dimercur
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*/
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#ifndef INC_CMD_H_
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#define INC_CMD_H_
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#include "main.h"
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typedef enum {
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pingCMD = 'p',
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resetCMD = 'r',
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setMotorCMD = 'm',
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startWWatchDogCMD = 'W',
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resetWatchdogCMD = 'w',
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getBatteryVoltageCMD = 'v',
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getVersionCMD = 'V',
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startWithoutWatchCMD = 'u',
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moveCMD = 'M',
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turnCMD = 'T',
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busyStateCMD = 'b',
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testCMD = 't',
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debugCMD = 'a',
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powerOffCMD = 'z'
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} CMD_Type;
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typedef enum {
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okANS = 'O',
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errANS = 'E',
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unknownANS = 'C',
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batOK = '2',
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batLOW = '1',
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batEMPTY = '0'
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} ANS_Type;
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#define END_OF_CMD '\r'
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typedef struct {
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CMD_Type type;
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} CMD_Generic;
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typedef struct {
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CMD_Type type;
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int32_t motor_left;
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int32_t motor_right;
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} CMD_SetMotor;
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typedef struct {
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CMD_Type type;
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int32_t distance;
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} CMD_Move;
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typedef struct {
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CMD_Type type;
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int32_t turns;
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} CMD_Turn;
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#define CMD_DECODE_INVALID ((CMD_Generic*)NULL)
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#define CMD_DECODE_UNKNOWN ((CMD_Generic*)UINT32_MAX)
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ANS_Type cmdIsValid(char* cmd);
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CMD_Generic* cmdDecode(char* cmd);
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void cmdSendAnswer(ANS_Type ans);
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void cmdSendBatteryLevel(char level);
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void cmdSendVersion();
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#endif /* INC_CMD_H_ */
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@ -7,6 +7,8 @@
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#include "stm32l0xx_hal.h"
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#include "stm32l0xx_hal.h"
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#include "cmsis_os.h"
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#include "cmsis_os.h"
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#define SYSTEM_VERSION_STR "version 2.0\r"
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#define STACK_SIZE 0x100
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#define STACK_SIZE 0x100
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#define PriorityMoteurs (configMAX_PRIORITIES -1)
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#define PriorityMoteurs (configMAX_PRIORITIES -1)
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@ -18,5 +20,7 @@
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#define PriorityLeds (configMAX_PRIORITIES -7)
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#define PriorityLeds (configMAX_PRIORITIES -7)
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#define BATTERIE_PERIODE_SCRUTATION 1000
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#define BATTERIE_PERIODE_SCRUTATION 1000
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#define XBEE_TX_SEMAPHORE_WAIT 500
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#define XBEE_RX_BUFFER_MAX_LENGTH 50
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TickType_t msToTicks(TickType_t ms);
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TickType_t msToTicks(TickType_t ms);
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@ -25,7 +25,10 @@ typedef enum {
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leds_charge_bat_3,
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leds_charge_bat_3,
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leds_charge_bat_4,
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leds_charge_bat_4,
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leds_charge_bat_5,
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leds_charge_bat_5,
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leds_erreur
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leds_erreur,
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cmd_rcv_ok,
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cmd_rcv_err,
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cmd_rcv_unknown
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} LEDS_State;
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} LEDS_State;
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void LEDS_Init(void);
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void LEDS_Init(void);
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@ -42,6 +42,7 @@ extern "C" {
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#include "batterie.h"
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#include "batterie.h"
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#include "sequenceur.h"
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#include "sequenceur.h"
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#include "xbee.h"
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#include "xbee.h"
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#include "cmd.h"
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/* USER CODE END Includes */
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/* USER CODE END Includes */
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@ -72,16 +73,18 @@ void Error_Handler(void);
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/* Private defines -----------------------------------------------------------*/
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/* Private defines -----------------------------------------------------------*/
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#define BATTERY_SENSE_Pin GPIO_PIN_0
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#define BATTERY_SENSE_Pin GPIO_PIN_0
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#define BATTERY_SENSE_GPIO_Port GPIOA
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#define BATTERY_SENSE_GPIO_Port GPIOA
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#define PWM_B_GAUCHE_Pin GPIO_PIN_1
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#define ENC_PHA_GAUCHE_Pin GPIO_PIN_1
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#define PWM_B_GAUCHE_GPIO_Port GPIOA
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#define ENC_PHA_GAUCHE_GPIO_Port GPIOA
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#define ENC_PHA_DROIT_Pin GPIO_PIN_2
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#define ENC_PHA_DROIT_Pin GPIO_PIN_2
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#define ENC_PHA_DROIT_GPIO_Port GPIOA
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#define ENC_PHA_DROIT_GPIO_Port GPIOA
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#define ENC_PHB_DROIT_Pin GPIO_PIN_3
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#define ENC_PHB_DROIT_Pin GPIO_PIN_3
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#define ENC_PHB_DROIT_GPIO_Port GPIOA
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#define ENC_PHB_DROIT_GPIO_Port GPIOA
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#define ENC_PHB_GAUCHE_Pin GPIO_PIN_6
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#define ENC_PHB_GAUCHE_Pin GPIO_PIN_5
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#define ENC_PHB_GAUCHE_GPIO_Port GPIOA
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#define ENC_PHB_GAUCHE_GPIO_Port GPIOA
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#define ENC_PHA_GAUCHE_Pin GPIO_PIN_7
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#define PWM_B_GAUCHE_Pin GPIO_PIN_6
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#define ENC_PHA_GAUCHE_GPIO_Port GPIOA
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#define PWM_B_GAUCHE_GPIO_Port GPIOA
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#define PWM_A_GAUCHE_Pin GPIO_PIN_7
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#define PWM_A_GAUCHE_GPIO_Port GPIOA
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#define PWM_A_DROIT_Pin GPIO_PIN_0
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#define PWM_A_DROIT_Pin GPIO_PIN_0
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#define PWM_A_DROIT_GPIO_Port GPIOB
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#define PWM_A_DROIT_GPIO_Port GPIOB
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#define PWM_B_DROIT_Pin GPIO_PIN_1
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#define PWM_B_DROIT_Pin GPIO_PIN_1
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@ -100,8 +103,6 @@ void Error_Handler(void);
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#define SHUTDOWN_ENCODERS_GPIO_Port GPIOB
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#define SHUTDOWN_ENCODERS_GPIO_Port GPIOB
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#define XBEE_RESET_Pin GPIO_PIN_10
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#define XBEE_RESET_Pin GPIO_PIN_10
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#define XBEE_RESET_GPIO_Port GPIOA
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#define XBEE_RESET_GPIO_Port GPIOA
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#define PWM_A_GAUCHE_Pin GPIO_PIN_15
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#define PWM_A_GAUCHE_GPIO_Port GPIOA
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#define BUTTON_SENSE_Pin GPIO_PIN_3
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#define BUTTON_SENSE_Pin GPIO_PIN_3
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#define BUTTON_SENSE_GPIO_Port GPIOB
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#define BUTTON_SENSE_GPIO_Port GPIOB
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#define BUTTON_SENSE_EXTI_IRQn EXTI2_3_IRQn
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#define BUTTON_SENSE_EXTI_IRQn EXTI2_3_IRQn
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extern QueueHandle_t LEDS_Mailbox;
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extern QueueHandle_t LEDS_Mailbox;
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extern QueueHandle_t MOTEURS_Mailbox;
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extern QueueHandle_t MOTEURS_Mailbox;
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extern QueueHandle_t SEQUENCEUR_Mailbox;
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extern QueueHandle_t SEQUENCEUR_Mailbox;
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extern QueueHandle_t BATTERIE_Mailbox;
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extern QueueHandle_t XBEE_Mailbox;
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#define MSG_ID_NO_MESSAGE 0x00
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#define MSG_ID_NO_MESSAGE 0x00
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#define MSG_ID_MOTEURS_MARCHE 0x40
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#define MSG_ID_MOTEURS_MARCHE 0x40
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#define MSG_ID_MOTEURS_ARRET 0x41
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#define MSG_ID_MOTEURS_ARRET 0x41
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#define MSG_ID_XBEE_CMD_VALIDE 0x50
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#define MSG_ID_XBEE_CMD 0x50
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#define MSG_ID_XBEE_CMD_INVALIDE 0x51
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#define MSG_ID_XBEE_REPONSE 0x52
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void MESSAGE_Init(void);
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void MESSAGE_Init(void);
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MESSAGE_Typedef MESSAGE_ReadMailbox(QueueHandle_t mbx);
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MESSAGE_Typedef MESSAGE_ReadMailbox(QueueHandle_t mbx);
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/*#define HAL_I2S_MODULE_ENABLED */
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/*#define HAL_I2S_MODULE_ENABLED */
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/*#define HAL_IWDG_MODULE_ENABLED */
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/*#define HAL_IWDG_MODULE_ENABLED */
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/*#define HAL_LCD_MODULE_ENABLED */
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/*#define HAL_LCD_MODULE_ENABLED */
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/*#define HAL_LPTIM_MODULE_ENABLED */
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#define HAL_LPTIM_MODULE_ENABLED
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/*#define HAL_RNG_MODULE_ENABLED */
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/*#define HAL_RNG_MODULE_ENABLED */
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/*#define HAL_RTC_MODULE_ENABLED */
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/*#define HAL_RTC_MODULE_ENABLED */
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/*#define HAL_SPI_MODULE_ENABLED */
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/*#define HAL_SPI_MODULE_ENABLED */
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void SysTick_Handler(void);
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void SysTick_Handler(void);
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void EXTI2_3_IRQHandler(void);
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void EXTI2_3_IRQHandler(void);
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void EXTI4_15_IRQHandler(void);
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void EXTI4_15_IRQHandler(void);
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void DMA1_Channel2_3_IRQHandler(void);
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void ADC1_COMP_IRQHandler(void);
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void ADC1_COMP_IRQHandler(void);
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void LPTIM1_IRQHandler(void);
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void LPUART1_IRQHandler(void);
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void LPUART1_IRQHandler(void);
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/* USER CODE BEGIN EFP */
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/* USER CODE BEGIN EFP */
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@ -11,5 +11,6 @@
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#include "main.h"
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#include "main.h"
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void XBEE_Init(void);
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void XBEE_Init(void);
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int XBEE_SendData(char* data, int length);
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#endif /* INC_XBEE_H_ */
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#endif /* INC_XBEE_H_ */
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@ -69,9 +69,12 @@ void BATTERIE_VoltageThread(void* params) {
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while (1) {
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while (1) {
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if (BATTERIE_LireTension(&tension) ==0) {
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if (BATTERIE_LireTension(&tension) ==0) {
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MESSAGE_SendMailbox(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGE, BATTERIE_Mailbox, (void*)&tension);
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if (HAL_GPIO_ReadPin(GPIOB, USB_SENSE_Pin)==GPIO_PIN_SET) // le chargeur est branché
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MESSAGE_SendMailbox(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGE, (QueueHandle_t)0x0, (void*)&tension);
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else
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MESSAGE_SendMailbox(SEQUENCEUR_Mailbox, MSG_ID_BAT_NIVEAU, (QueueHandle_t)0x0, (void*)&tension);
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} else {
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} else {
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MESSAGE_SendMailbox(SEQUENCEUR_Mailbox, MSG_ID_BAT_ADC_ERR, BATTERIE_Mailbox, (void*)0x0);
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MESSAGE_SendMailbox(SEQUENCEUR_Mailbox, MSG_ID_BAT_ADC_ERR, (QueueHandle_t)0x0, (void*)0x0);
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}
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}
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vTaskDelay(pdMS_TO_TICKS(BATTERIE_PERIODE_SCRUTATION));
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vTaskDelay(pdMS_TO_TICKS(BATTERIE_PERIODE_SCRUTATION));
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@ -106,13 +109,13 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) {
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if (GPIO_Pin == USB_SENSE_Pin) { // Le chargeur vient d'etre branché ou debranché
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if (GPIO_Pin == USB_SENSE_Pin) { // Le chargeur vient d'etre branché ou debranché
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if (HAL_GPIO_ReadPin(GPIOB, GPIO_Pin)==GPIO_PIN_SET) // le chargeur est branché
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if (HAL_GPIO_ReadPin(GPIOB, GPIO_Pin)==GPIO_PIN_SET) // le chargeur est branché
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MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGEUR_ON, BATTERIE_Mailbox, 0x0, &xHigherPriorityTaskWoken);
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MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGEUR_ON, (QueueHandle_t)0x0, 0x0, &xHigherPriorityTaskWoken);
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else
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else
|
||||||
MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGEUR_OFF, BATTERIE_Mailbox, 0x0, &xHigherPriorityTaskWoken);
|
MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BAT_CHARGEUR_OFF, (QueueHandle_t)0x0, 0x0, &xHigherPriorityTaskWoken);
|
||||||
}
|
}
|
||||||
else if (GPIO_Pin == BUTTON_SENSE_Pin) { // on vient d'appuyer sur le bouton on/off
|
else if (GPIO_Pin == BUTTON_SENSE_Pin) { // on vient d'appuyer sur le bouton on/off
|
||||||
if (HAL_GPIO_ReadPin(GPIOB, GPIO_Pin)==GPIO_PIN_SET) // le chargeur est branché
|
if (HAL_GPIO_ReadPin(GPIOB, GPIO_Pin)==GPIO_PIN_SET) // le chargeur est branché
|
||||||
MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BUTTON_PRESSED, BATTERIE_Mailbox, 0x0, &xHigherPriorityTaskWoken);
|
MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_BUTTON_PRESSED, (QueueHandle_t)0x0, 0x0, &xHigherPriorityTaskWoken);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (xHigherPriorityTaskWoken) {
|
if (xHigherPriorityTaskWoken) {
|
||||||
|
|
|
||||||
150
software/dumber3/Core/Src/cmd.c
Normal file
150
software/dumber3/Core/Src/cmd.c
Normal file
|
|
@ -0,0 +1,150 @@
|
||||||
|
/*
|
||||||
|
* cmd.c
|
||||||
|
*
|
||||||
|
* Created on: 3 oct. 2022
|
||||||
|
* Author: dimercur
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "cmd.h"
|
||||||
|
#include <stdlib.h>
|
||||||
|
#include <string.h>
|
||||||
|
#include <stdio.h>
|
||||||
|
|
||||||
|
/* Definition des commandes */
|
||||||
|
|
||||||
|
//void cmdAddChecksum(char* ans) {
|
||||||
|
// uint16_t j;
|
||||||
|
// unsigned char checksum=0;
|
||||||
|
//
|
||||||
|
// for (j = 0; ans[j] != END_OF_CMD; j++)
|
||||||
|
// checksum ^= ans[j];
|
||||||
|
// if (checksum == END_OF_CMD)
|
||||||
|
// checksum++;
|
||||||
|
// ans[j] = checksum;
|
||||||
|
// ans[j + 1] = END_OF_CMD;
|
||||||
|
//}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Verifie le checksum de la commande recue
|
||||||
|
*
|
||||||
|
* Vérifie le dernier carctére de receiptString sensé être le checksum.
|
||||||
|
* Si celui-ci est bon, ll retournera 0 et supprimera le checksum du tableau receiptString
|
||||||
|
* sinon il retournera 1 sans faire de modification.
|
||||||
|
* @param None
|
||||||
|
* @retval 0 ou 1
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
ANS_Type cmdVerifyChecksum(char* cmd) {
|
||||||
|
uint16_t j;
|
||||||
|
uint16_t length;
|
||||||
|
unsigned char checksum=0;
|
||||||
|
|
||||||
|
length = strlen(cmd);
|
||||||
|
for (j = 0; j < length - 2; j++) {
|
||||||
|
checksum ^= cmd[j];
|
||||||
|
}
|
||||||
|
if (checksum == END_OF_CMD)
|
||||||
|
checksum++;
|
||||||
|
|
||||||
|
if (cmd[j] == checksum) {
|
||||||
|
cmd[length - 2] = 0;
|
||||||
|
cmd[length - 1] = 0;
|
||||||
|
cmd[length] = 0;
|
||||||
|
|
||||||
|
return okANS;
|
||||||
|
} else
|
||||||
|
return errANS;
|
||||||
|
}
|
||||||
|
|
||||||
|
ANS_Type cmdIsValid(char* cmd) {
|
||||||
|
uint16_t j;
|
||||||
|
uint16_t length;
|
||||||
|
unsigned char checksum=0;
|
||||||
|
|
||||||
|
length = strlen(cmd);
|
||||||
|
for (j = 0; j < length - 2; j++) {
|
||||||
|
checksum ^= cmd[j];
|
||||||
|
}
|
||||||
|
if (checksum == END_OF_CMD)
|
||||||
|
checksum++;
|
||||||
|
|
||||||
|
if (cmd[j] == checksum)
|
||||||
|
return okANS;
|
||||||
|
else
|
||||||
|
return errANS;
|
||||||
|
}
|
||||||
|
|
||||||
|
CMD_Generic* cmdDecode(char* cmd) {
|
||||||
|
CMD_Generic* decodedCmd;
|
||||||
|
|
||||||
|
if (cmdVerifyChecksum(cmd) != okANS)
|
||||||
|
return CMD_DECODE_INVALID;
|
||||||
|
else if (cmd[0] == moveCMD) {
|
||||||
|
int32_t laps;
|
||||||
|
uint16_t testReception = sscanf(cmd, "M=%li", &laps);
|
||||||
|
|
||||||
|
if (testReception!=1) return CMD_DECODE_INVALID;
|
||||||
|
else {
|
||||||
|
decodedCmd=(CMD_Generic*)malloc(sizeof(CMD_Move));
|
||||||
|
((CMD_Move*)decodedCmd)->type = moveCMD;
|
||||||
|
((CMD_Move*)decodedCmd)->distance = laps;
|
||||||
|
}
|
||||||
|
} else if (cmd[0] == turnCMD) {
|
||||||
|
int32_t degree;
|
||||||
|
uint16_t testReception = sscanf(cmd, "T=%li", °ree);
|
||||||
|
|
||||||
|
if (testReception != 1) return CMD_DECODE_INVALID;
|
||||||
|
else {
|
||||||
|
degree = degree * 1.40;
|
||||||
|
decodedCmd=(CMD_Generic*)malloc(sizeof(CMD_Turn));
|
||||||
|
((CMD_Turn*)decodedCmd)->type = moveCMD;
|
||||||
|
((CMD_Turn*)decodedCmd)->turns= degree;
|
||||||
|
}
|
||||||
|
} else if (cmd[0] == setMotorCMD) {
|
||||||
|
int32_t moteurG,moteurD;
|
||||||
|
uint16_t testReception = sscanf(cmd, "m=%li,%li", &moteurG, &moteurD);
|
||||||
|
|
||||||
|
if (testReception != 1) return CMD_DECODE_INVALID;
|
||||||
|
else {
|
||||||
|
decodedCmd=(CMD_Generic*)malloc(sizeof(CMD_SetMotor));
|
||||||
|
((CMD_SetMotor*)decodedCmd)->type = moveCMD;
|
||||||
|
((CMD_SetMotor*)decodedCmd)->motor_left= moteurG;
|
||||||
|
((CMD_SetMotor*)decodedCmd)->motor_right= moteurD;
|
||||||
|
}
|
||||||
|
} else if ((cmd[0] == pingCMD) || (cmd[0] == resetCMD) || (cmd[0] == startWWatchDogCMD) || (cmd[0] == resetWatchdogCMD) ||
|
||||||
|
(cmd[0] == getBatteryVoltageCMD) || (cmd[0] == getVersionCMD) || (cmd[0] == startWithoutWatchCMD) || (cmd[0] == busyStateCMD) ||
|
||||||
|
(cmd[0] == testCMD) || (cmd[0] == debugCMD) || (cmd[0] == powerOffCMD)) {
|
||||||
|
decodedCmd=(CMD_Generic*)malloc(sizeof(CMD_Generic));
|
||||||
|
decodedCmd->type = cmd[0];
|
||||||
|
} else return CMD_DECODE_UNKNOWN;
|
||||||
|
|
||||||
|
return decodedCmd;
|
||||||
|
}
|
||||||
|
|
||||||
|
void cmdSendAnswer(ANS_Type ans) {
|
||||||
|
char cmdStr[4];
|
||||||
|
cmdStr[0] = (char)ans;
|
||||||
|
cmdStr[1] = (char)ans;
|
||||||
|
cmdStr[2] = END_OF_CMD;
|
||||||
|
cmdStr[3] = 0; // end of string
|
||||||
|
XBEE_SendData(cmdStr, 3);
|
||||||
|
}
|
||||||
|
|
||||||
|
void cmdSendBatteryLevel(char level) {
|
||||||
|
char cmdStr[4];
|
||||||
|
char localLevel=level;
|
||||||
|
|
||||||
|
if (localLevel<0) localLevel=0;
|
||||||
|
else if (localLevel>2) localLevel=2;
|
||||||
|
|
||||||
|
cmdStr[0] = localLevel+'0';
|
||||||
|
cmdStr[1] = localLevel+'0';
|
||||||
|
cmdStr[2] = END_OF_CMD;
|
||||||
|
cmdStr[3] = 0; // end of string
|
||||||
|
XBEE_SendData(cmdStr, 3);
|
||||||
|
}
|
||||||
|
|
||||||
|
void cmdSendVersion() {
|
||||||
|
XBEE_SendData(SYSTEM_VERSION_STR, strlen(SYSTEM_VERSION_STR));
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -49,19 +49,18 @@ void LEDS_Init(void) {
|
||||||
vTaskResume(xHandleLeds);
|
vTaskResume(xHandleLeds);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void LEDS_AnimationThread(void* params) {
|
void LEDS_AnimationThread(void* params) {
|
||||||
MESSAGE_Typedef msg;
|
MESSAGE_Typedef msg;
|
||||||
uint8_t cnt=0;
|
uint8_t cnt=0;
|
||||||
|
static int oneShot=1;
|
||||||
|
|
||||||
while (1) {
|
while (1) {
|
||||||
vTaskDelay(pdMS_TO_TICKS(100));
|
vTaskDelay(pdMS_TO_TICKS(100));
|
||||||
|
|
||||||
msg = MESSAGE_ReadMailboxNoDelay(LEDS_Mailbox);
|
msg = MESSAGE_ReadMailboxNoDelay(LEDS_Mailbox);
|
||||||
|
|
||||||
cnt++;
|
cnt++;
|
||||||
|
|
||||||
if (msg.id == MSG_ID_LED_ETAT) { // Si c'est bien un message de changemnet d'etat LEDS
|
if (msg.id == MSG_ID_LED_ETAT) { // Si c'est bien un message de changement d'etat LEDS
|
||||||
LEDS_Animation = *((LEDS_State*)msg.data);
|
LEDS_Animation = *((LEDS_State*)msg.data);
|
||||||
|
|
||||||
if (LEDS_Animation != LEDS_AnimationAncien) { // si le nouvel etat est different de l'ancien
|
if (LEDS_Animation != LEDS_AnimationAncien) { // si le nouvel etat est different de l'ancien
|
||||||
|
|
@ -73,6 +72,12 @@ void LEDS_AnimationThread(void* params) {
|
||||||
LEDS_EteintRouge();
|
LEDS_EteintRouge();
|
||||||
cnt=0;
|
cnt=0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if ((LEDS_Animation == cmd_rcv_ok) || (LEDS_Animation == cmd_rcv_err) || (LEDS_Animation == cmd_rcv_unknown))
|
||||||
|
{
|
||||||
|
oneShot =1;
|
||||||
|
cnt=0;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
switch (LEDS_Animation) {
|
switch (LEDS_Animation) {
|
||||||
|
|
@ -193,6 +198,42 @@ void LEDS_AnimationThread(void* params) {
|
||||||
else
|
else
|
||||||
cnt=0;
|
cnt=0;
|
||||||
break;
|
break;
|
||||||
|
case cmd_rcv_ok:
|
||||||
|
if (oneShot) {
|
||||||
|
if (cnt<3)
|
||||||
|
LEDS_AllumeVerte();
|
||||||
|
else if (cnt<10)
|
||||||
|
LEDS_EteintVerte();
|
||||||
|
else {
|
||||||
|
cnt=0;
|
||||||
|
oneShot=0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case cmd_rcv_err:
|
||||||
|
if (oneShot) {
|
||||||
|
if (cnt<3)
|
||||||
|
LEDS_AllumeRouge();
|
||||||
|
else if (cnt<10)
|
||||||
|
LEDS_EteintRouge();
|
||||||
|
else {
|
||||||
|
cnt=0;
|
||||||
|
oneShot=0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case cmd_rcv_unknown:
|
||||||
|
if (oneShot) {
|
||||||
|
if (cnt<3)
|
||||||
|
LEDS_AllumeJaune();
|
||||||
|
else if (cnt<10)
|
||||||
|
LEDS_EteintJaune();
|
||||||
|
else {
|
||||||
|
cnt=0;
|
||||||
|
oneShot=0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -20,8 +20,6 @@ void MESSAGE_Init(void) {
|
||||||
LEDS_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef));
|
LEDS_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef));
|
||||||
MOTEURS_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef));
|
MOTEURS_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef));
|
||||||
SEQUENCEUR_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef));
|
SEQUENCEUR_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef));
|
||||||
BATTERIE_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef));
|
|
||||||
XBEE_Mailbox = xQueueCreate(QUEUE_SIZE, sizeof(MESSAGE_Typedef));
|
|
||||||
}
|
}
|
||||||
|
|
||||||
MESSAGE_Typedef MESSAGE_ReadMailbox(QueueHandle_t mbx) {
|
MESSAGE_Typedef MESSAGE_ReadMailbox(QueueHandle_t mbx) {
|
||||||
|
|
|
||||||
|
|
@ -6,6 +6,9 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "sequenceur.h"
|
#include "sequenceur.h"
|
||||||
|
#include "timers.h"
|
||||||
|
#include "string.h"
|
||||||
|
#include <stdlib.h>
|
||||||
|
|
||||||
StaticTask_t xTaskSequenceurMain;
|
StaticTask_t xTaskSequenceurMain;
|
||||||
|
|
||||||
|
|
@ -15,20 +18,45 @@ StaticTask_t xTaskSequenceurMain;
|
||||||
StackType_t xStackSequenceurMain[ STACK_SIZE ];
|
StackType_t xStackSequenceurMain[ STACK_SIZE ];
|
||||||
TaskHandle_t xHandleSequenceurMain = NULL;
|
TaskHandle_t xHandleSequenceurMain = NULL;
|
||||||
|
|
||||||
StaticTask_t xTaskSequenceurTimeout;
|
StaticTimer_t xBufferTimerTimeout;
|
||||||
|
TimerHandle_t xHandleTimerTimeout = NULL;
|
||||||
/* Buffer that the task being created will use as its stack. Note this is
|
void vTimerTimeoutCallback( TimerHandle_t xTimer );
|
||||||
an array of StackType_t variables. The size of StackType_t is dependent on
|
|
||||||
the RTOS port. */
|
|
||||||
StackType_t xStackSequenceurTimeout[ STACK_SIZE ];
|
|
||||||
TaskHandle_t xHandleSequenceurTimeout = NULL;
|
|
||||||
|
|
||||||
void SEQUENCEUR_MainThread(void* params);
|
void SEQUENCEUR_MainThread(void* params);
|
||||||
void SEQUENCEUR_TimeoutThread(void* params);
|
void SEQUENCEUR_TimeoutThread(void* params);
|
||||||
|
void SEQUENCEUR_StateMachine();
|
||||||
|
LEDS_State SEQUENCEUR_BatteryLevel(uint16_t voltage, char inCharge);
|
||||||
|
void SEQUENCEUR_PowerOff();
|
||||||
|
|
||||||
uint16_t SEQUENCEUR_CntTimeout;
|
uint16_t SEQUENCEUR_CntTimeout;
|
||||||
uint16_t SEQUENCEUR_CntPowerOff;
|
uint16_t SEQUENCEUR_CntPowerOff;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
stateStartup=0,
|
||||||
|
stateIdle,
|
||||||
|
stateRun,
|
||||||
|
stateInCharge,
|
||||||
|
stateInMouvement,
|
||||||
|
stateWatchdogDisable,
|
||||||
|
stateLowBatDisable
|
||||||
|
} SEQUENCEUR_State;
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
SEQUENCEUR_State state;
|
||||||
|
CMD_Type cmd;
|
||||||
|
uint16_t batteryVoltage;
|
||||||
|
char batteryUpdate;
|
||||||
|
char inCharge;
|
||||||
|
int32_t distance;
|
||||||
|
int32_t turns;
|
||||||
|
int32_t motor_left;
|
||||||
|
int32_t motor_right;
|
||||||
|
char endOfMouvement;
|
||||||
|
char powerOffRequired;
|
||||||
|
} SEQUENCEUR_Infos;
|
||||||
|
|
||||||
|
SEQUENCEUR_Infos systemInfos = {0};
|
||||||
|
|
||||||
void SEQUENCEUR_Init(void) {
|
void SEQUENCEUR_Init(void) {
|
||||||
/* Create the task without using any dynamic memory allocation. */
|
/* Create the task without using any dynamic memory allocation. */
|
||||||
xHandleSequenceurMain = xTaskCreateStatic(
|
xHandleSequenceurMain = xTaskCreateStatic(
|
||||||
|
|
@ -42,24 +70,192 @@ void SEQUENCEUR_Init(void) {
|
||||||
vTaskResume(xHandleSequenceurMain);
|
vTaskResume(xHandleSequenceurMain);
|
||||||
|
|
||||||
/* Create the task without using any dynamic memory allocation. */
|
/* Create the task without using any dynamic memory allocation. */
|
||||||
xHandleSequenceurTimeout = xTaskCreateStatic(
|
|
||||||
SEQUENCEUR_TimeoutThread, /* Function that implements the task. */
|
xHandleTimerTimeout = xTimerCreateStatic(
|
||||||
"SEQUENCEUR Timeout", /* Text name for the task. */
|
"Seq Timer",
|
||||||
STACK_SIZE, /* Number of indexes in the xStack array. */
|
//pdMS_TO_TICKS(100),
|
||||||
NULL, /* Parameter passed into the task. */
|
pdMS_TO_TICKS(2000),
|
||||||
PrioritySequenceurTimeout,/* Priority at which the task is created. */
|
pdTRUE,
|
||||||
xStackSequenceurTimeout, /* Array to use as the task's stack. */
|
( void * ) 0,
|
||||||
&xTaskSequenceurTimeout); /* Variable to hold the task's data structure. */
|
vTimerTimeoutCallback,
|
||||||
vTaskResume(xHandleSequenceurTimeout);
|
&xBufferTimerTimeout);
|
||||||
|
xTimerStart(xHandleTimerTimeout,0 );
|
||||||
|
|
||||||
SEQUENCEUR_CntTimeout =0;
|
SEQUENCEUR_CntTimeout =0;
|
||||||
SEQUENCEUR_CntPowerOff=0;
|
SEQUENCEUR_CntPowerOff=0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void SEQUENCEUR_MainThread(void* params) {
|
void SEQUENCEUR_MainThread(void* params) {
|
||||||
|
MESSAGE_Typedef msg;
|
||||||
|
|
||||||
|
char *cmd;
|
||||||
|
CMD_Generic* decodedCmd;
|
||||||
|
|
||||||
|
while (1) {
|
||||||
|
msg = MESSAGE_ReadMailbox(SEQUENCEUR_Mailbox);
|
||||||
|
|
||||||
|
switch (msg.id) {
|
||||||
|
case MSG_ID_XBEE_CMD:
|
||||||
|
cmd = (char*)msg.data;
|
||||||
|
|
||||||
|
if (cmdIsValid(cmd)!= okANS)
|
||||||
|
cmdSendAnswer(errANS);
|
||||||
|
else {
|
||||||
|
decodedCmd = cmdDecode(cmd);
|
||||||
|
|
||||||
|
if (decodedCmd==CMD_DECODE_INVALID)
|
||||||
|
cmdSendAnswer(errANS);
|
||||||
|
else if (decodedCmd==CMD_DECODE_UNKNOWN)
|
||||||
|
cmdSendAnswer(unknownANS);
|
||||||
|
else {
|
||||||
|
systemInfos.cmd = decodedCmd->type;
|
||||||
|
if (decodedCmd->type == moveCMD)
|
||||||
|
systemInfos.distance = ((CMD_Move*)decodedCmd)->distance;
|
||||||
|
else if (decodedCmd->type == turnCMD)
|
||||||
|
systemInfos.turns = ((CMD_Turn*)decodedCmd)->turns;
|
||||||
|
else if (decodedCmd->type == setMotorCMD) {
|
||||||
|
systemInfos.motor_left = ((CMD_SetMotor*)decodedCmd)->motor_left;
|
||||||
|
systemInfos.motor_right = ((CMD_SetMotor*)decodedCmd)->motor_right;
|
||||||
|
}
|
||||||
|
|
||||||
|
free(decodedCmd);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
free(cmd);
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MSG_ID_BAT_NIVEAU:
|
||||||
|
case MSG_ID_BAT_CHARGE:
|
||||||
|
systemInfos.batteryVoltage = *((uint16_t*)msg.data);
|
||||||
|
systemInfos.batteryUpdate = 1;
|
||||||
|
|
||||||
|
if (msg.id == MSG_ID_BAT_CHARGE)
|
||||||
|
systemInfos.inCharge =1;
|
||||||
|
else
|
||||||
|
systemInfos.inCharge =0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MSG_ID_BAT_CHARGEUR_ON:
|
||||||
|
case MSG_ID_BAT_CHARGEUR_OFF:
|
||||||
|
if (msg.id == MSG_ID_BAT_CHARGEUR_ON)
|
||||||
|
systemInfos.inCharge =1;
|
||||||
|
else
|
||||||
|
systemInfos.inCharge =0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MSG_ID_MOTEURS_ARRET:
|
||||||
|
systemInfos.endOfMouvement= 1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case MSG_ID_BUTTON_PRESSED:
|
||||||
|
systemInfos.powerOffRequired =1;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
SEQUENCEUR_StateMachine();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void SEQUENCEUR_StateMachine() {
|
||||||
|
LEDS_State ledState = leds_off;
|
||||||
|
|
||||||
|
if (systemInfos.inCharge) {
|
||||||
|
systemInfos.state = stateInCharge;
|
||||||
|
} else if (systemInfos.batteryUpdate) {
|
||||||
|
ledState = SEQUENCEUR_BatteryLevel(systemInfos.batteryVoltage, systemInfos.inCharge);
|
||||||
|
|
||||||
|
if (ledState == leds_niveau_bat_0)
|
||||||
|
systemInfos.state= stateLowBatDisable;
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (systemInfos.cmd) { // commands common to every state
|
||||||
|
case pingCMD:
|
||||||
|
break;
|
||||||
|
case getVersionCMD:
|
||||||
|
break;
|
||||||
|
case getBatteryVoltageCMD:
|
||||||
|
break;
|
||||||
|
case powerOffCMD:
|
||||||
|
break;
|
||||||
|
case resetCMD:
|
||||||
|
break;
|
||||||
|
case busyStateCMD:
|
||||||
|
break;
|
||||||
|
case testCMD:
|
||||||
|
break;
|
||||||
|
case debugCMD:
|
||||||
|
break;
|
||||||
|
default: // commands no common for every states
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (systemInfos.state) {
|
||||||
|
case stateStartup:
|
||||||
|
if (systemInfos.batteryUpdate) {
|
||||||
|
ledState = SEQUENCEUR_BatteryLevel(systemInfos.batteryVoltage, systemInfos.inCharge);
|
||||||
|
MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&ledState);
|
||||||
|
|
||||||
|
vTaskDelay(pdMS_TO_TICKS(2000)); // wait 2s
|
||||||
|
|
||||||
|
systemInfos.state= stateIdle;
|
||||||
|
ledState = leds_idle;
|
||||||
|
MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&ledState);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case stateIdle:
|
||||||
|
if (systemInfos.powerOffRequired)
|
||||||
|
SEQUENCEUR_PowerOff();
|
||||||
|
break;
|
||||||
|
case stateRun:
|
||||||
|
if (systemInfos.powerOffRequired)
|
||||||
|
SEQUENCEUR_PowerOff();
|
||||||
|
break;
|
||||||
|
case stateInCharge:
|
||||||
|
if (!systemInfos.inCharge) {
|
||||||
|
systemInfos.state = stateIdle;
|
||||||
|
ledState = leds_idle;
|
||||||
|
MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&ledState);
|
||||||
|
} else if (systemInfos.batteryUpdate) {
|
||||||
|
ledState = SEQUENCEUR_BatteryLevel(systemInfos.batteryVoltage, systemInfos.inCharge);
|
||||||
|
MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&ledState);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case stateInMouvement:
|
||||||
|
if (systemInfos.powerOffRequired)
|
||||||
|
SEQUENCEUR_PowerOff();
|
||||||
|
break;
|
||||||
|
case stateWatchdogDisable:
|
||||||
|
if (systemInfos.powerOffRequired)
|
||||||
|
SEQUENCEUR_PowerOff();
|
||||||
|
break;
|
||||||
|
case stateLowBatDisable:
|
||||||
|
ledState = leds_charge_bat_0;
|
||||||
|
MESSAGE_SendMailbox(LEDS_Mailbox, MSG_ID_LED_ETAT, SEQUENCEUR_Mailbox, (void*)&ledState);
|
||||||
|
|
||||||
|
vTaskDelay(pdMS_TO_TICKS(2000)); // wait 2s
|
||||||
|
|
||||||
|
SEQUENCEUR_PowerOff();
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
systemInfos.batteryUpdate = 0;
|
||||||
|
systemInfos.cmd =0;
|
||||||
|
systemInfos.endOfMouvement =0;
|
||||||
|
systemInfos.powerOffRequired=0;
|
||||||
|
}
|
||||||
|
|
||||||
|
LEDS_State SEQUENCEUR_BatteryLevel(uint16_t voltage, char inCharge) {
|
||||||
|
LEDS_State ledState=leds_niveau_bat_0;
|
||||||
|
|
||||||
|
return ledState;
|
||||||
|
}
|
||||||
|
|
||||||
|
void SEQUENCEUR_PowerOff() {
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void SEQUENCEUR_TimeoutThread(void* params) {
|
/* This task is called every 2s */
|
||||||
|
void vTimerTimeoutCallback( TimerHandle_t xTimer ) {
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -24,6 +24,7 @@
|
||||||
/* USER CODE BEGIN Includes */
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
/* USER CODE END Includes */
|
/* USER CODE END Includes */
|
||||||
|
extern DMA_HandleTypeDef hdma_lpuart1_tx;
|
||||||
|
|
||||||
/* Private typedef -----------------------------------------------------------*/
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
/* USER CODE BEGIN TD */
|
/* USER CODE BEGIN TD */
|
||||||
|
|
@ -60,7 +61,7 @@
|
||||||
/* USER CODE END 0 */
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||||
/**
|
/**
|
||||||
* Initializes the Global MSP.
|
* Initializes the Global MSP.
|
||||||
*/
|
*/
|
||||||
void HAL_MspInit(void)
|
void HAL_MspInit(void)
|
||||||
|
|
@ -147,6 +148,56 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LPTIM MSP Initialization
|
||||||
|
* This function configures the hardware resources used in this example
|
||||||
|
* @param hlptim: LPTIM handle pointer
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef* hlptim)
|
||||||
|
{
|
||||||
|
if(hlptim->Instance==LPTIM1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN LPTIM1_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END LPTIM1_MspInit 0 */
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
__HAL_RCC_LPTIM1_CLK_ENABLE();
|
||||||
|
/* LPTIM1 interrupt Init */
|
||||||
|
HAL_NVIC_SetPriority(LPTIM1_IRQn, 3, 0);
|
||||||
|
HAL_NVIC_EnableIRQ(LPTIM1_IRQn);
|
||||||
|
/* USER CODE BEGIN LPTIM1_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END LPTIM1_MspInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LPTIM MSP De-Initialization
|
||||||
|
* This function freeze the hardware resources used in this example
|
||||||
|
* @param hlptim: LPTIM handle pointer
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef* hlptim)
|
||||||
|
{
|
||||||
|
if(hlptim->Instance==LPTIM1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN LPTIM1_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END LPTIM1_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_LPTIM1_CLK_DISABLE();
|
||||||
|
|
||||||
|
/* LPTIM1 interrupt DeInit */
|
||||||
|
HAL_NVIC_DisableIRQ(LPTIM1_IRQn);
|
||||||
|
/* USER CODE BEGIN LPTIM1_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END LPTIM1_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief UART MSP Initialization
|
* @brief UART MSP Initialization
|
||||||
* This function configures the hardware resources used in this example
|
* This function configures the hardware resources used in this example
|
||||||
|
|
@ -176,6 +227,24 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF4_LPUART1;
|
GPIO_InitStruct.Alternate = GPIO_AF4_LPUART1;
|
||||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* LPUART1 DMA Init */
|
||||||
|
/* LPUART1_TX Init */
|
||||||
|
hdma_lpuart1_tx.Instance = DMA1_Channel2;
|
||||||
|
hdma_lpuart1_tx.Init.Request = DMA_REQUEST_5;
|
||||||
|
hdma_lpuart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||||
|
hdma_lpuart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
|
hdma_lpuart1_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
|
hdma_lpuart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||||
|
hdma_lpuart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||||
|
hdma_lpuart1_tx.Init.Mode = DMA_NORMAL;
|
||||||
|
hdma_lpuart1_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
|
if (HAL_DMA_Init(&hdma_lpuart1_tx) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_LINKDMA(huart,hdmatx,hdma_lpuart1_tx);
|
||||||
|
|
||||||
/* LPUART1 interrupt Init */
|
/* LPUART1 interrupt Init */
|
||||||
HAL_NVIC_SetPriority(LPUART1_IRQn, 3, 0);
|
HAL_NVIC_SetPriority(LPUART1_IRQn, 3, 0);
|
||||||
HAL_NVIC_EnableIRQ(LPUART1_IRQn);
|
HAL_NVIC_EnableIRQ(LPUART1_IRQn);
|
||||||
|
|
@ -208,6 +277,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
||||||
*/
|
*/
|
||||||
HAL_GPIO_DeInit(GPIOB, USART_TX_Pin|USART_RX_Pin);
|
HAL_GPIO_DeInit(GPIOB, USART_TX_Pin|USART_RX_Pin);
|
||||||
|
|
||||||
|
/* LPUART1 DMA DeInit */
|
||||||
|
HAL_DMA_DeInit(huart->hdmatx);
|
||||||
|
|
||||||
/* LPUART1 interrupt DeInit */
|
/* LPUART1 interrupt DeInit */
|
||||||
HAL_NVIC_DisableIRQ(LPUART1_IRQn);
|
HAL_NVIC_DisableIRQ(LPUART1_IRQn);
|
||||||
/* USER CODE BEGIN LPUART1_MspDeInit 1 */
|
/* USER CODE BEGIN LPUART1_MspDeInit 1 */
|
||||||
|
|
@ -217,39 +289,6 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief TIM_Base MSP Initialization
|
|
||||||
* This function configures the hardware resources used in this example
|
|
||||||
* @param htim_base: TIM_Base handle pointer
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
|
||||||
{
|
|
||||||
if(htim_base->Instance==TIM2)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM2_MspInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM2_MspInit 0 */
|
|
||||||
/* Peripheral clock enable */
|
|
||||||
__HAL_RCC_TIM2_CLK_ENABLE();
|
|
||||||
/* USER CODE BEGIN TIM2_MspInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM2_MspInit 1 */
|
|
||||||
}
|
|
||||||
else if(htim_base->Instance==TIM3)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM3_MspInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM3_MspInit 0 */
|
|
||||||
/* Peripheral clock enable */
|
|
||||||
__HAL_RCC_TIM3_CLK_ENABLE();
|
|
||||||
/* USER CODE BEGIN TIM3_MspInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM3_MspInit 1 */
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief TIM_Encoder MSP Initialization
|
* @brief TIM_Encoder MSP Initialization
|
||||||
* This function configures the hardware resources used in this example
|
* This function configures the hardware resources used in this example
|
||||||
|
|
@ -259,7 +298,38 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
||||||
void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder)
|
void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder)
|
||||||
{
|
{
|
||||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
if(htim_encoder->Instance==TIM21)
|
if(htim_encoder->Instance==TIM2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM2_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspInit 0 */
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
__HAL_RCC_TIM2_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
/**TIM2 GPIO Configuration
|
||||||
|
PA1 ------> TIM2_CH2
|
||||||
|
PA5 ------> TIM2_CH1
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = ENC_PHA_GAUCHE_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF2_TIM2;
|
||||||
|
HAL_GPIO_Init(ENC_PHA_GAUCHE_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = ENC_PHB_GAUCHE_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF5_TIM2;
|
||||||
|
HAL_GPIO_Init(ENC_PHB_GAUCHE_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM2_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspInit 1 */
|
||||||
|
}
|
||||||
|
else if(htim_encoder->Instance==TIM21)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM21_MspInit 0 */
|
/* USER CODE BEGIN TIM21_MspInit 0 */
|
||||||
|
|
||||||
|
|
@ -283,29 +353,27 @@ void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder)
|
||||||
|
|
||||||
/* USER CODE END TIM21_MspInit 1 */
|
/* USER CODE END TIM21_MspInit 1 */
|
||||||
}
|
}
|
||||||
else if(htim_encoder->Instance==TIM22)
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief TIM_Base MSP Initialization
|
||||||
|
* This function configures the hardware resources used in this example
|
||||||
|
* @param htim_base: TIM_Base handle pointer
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
||||||
|
{
|
||||||
|
if(htim_base->Instance==TIM3)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM22_MspInit 0 */
|
/* USER CODE BEGIN TIM3_MspInit 0 */
|
||||||
|
|
||||||
/* USER CODE END TIM22_MspInit 0 */
|
/* USER CODE END TIM3_MspInit 0 */
|
||||||
/* Peripheral clock enable */
|
/* Peripheral clock enable */
|
||||||
__HAL_RCC_TIM22_CLK_ENABLE();
|
__HAL_RCC_TIM3_CLK_ENABLE();
|
||||||
|
/* USER CODE BEGIN TIM3_MspInit 1 */
|
||||||
|
|
||||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
/* USER CODE END TIM3_MspInit 1 */
|
||||||
/**TIM22 GPIO Configuration
|
|
||||||
PA6 ------> TIM22_CH1
|
|
||||||
PA7 ------> TIM22_CH2
|
|
||||||
*/
|
|
||||||
GPIO_InitStruct.Pin = ENC_PHB_GAUCHE_Pin|ENC_PHA_GAUCHE_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF5_TIM22;
|
|
||||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM22_MspInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM22_MspInit 1 */
|
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
@ -313,45 +381,27 @@ void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder)
|
||||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
|
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
|
||||||
{
|
{
|
||||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
if(htim->Instance==TIM2)
|
if(htim->Instance==TIM3)
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM2_MspPostInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM2_MspPostInit 0 */
|
|
||||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
||||||
/**TIM2 GPIO Configuration
|
|
||||||
PA1 ------> TIM2_CH2
|
|
||||||
PA15 ------> TIM2_CH1
|
|
||||||
*/
|
|
||||||
GPIO_InitStruct.Pin = PWM_B_GAUCHE_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF2_TIM2;
|
|
||||||
HAL_GPIO_Init(PWM_B_GAUCHE_GPIO_Port, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
GPIO_InitStruct.Pin = PWM_A_GAUCHE_Pin;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF5_TIM2;
|
|
||||||
HAL_GPIO_Init(PWM_A_GAUCHE_GPIO_Port, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM2_MspPostInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM2_MspPostInit 1 */
|
|
||||||
}
|
|
||||||
else if(htim->Instance==TIM3)
|
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM3_MspPostInit 0 */
|
/* USER CODE BEGIN TIM3_MspPostInit 0 */
|
||||||
|
|
||||||
/* USER CODE END TIM3_MspPostInit 0 */
|
/* USER CODE END TIM3_MspPostInit 0 */
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
/**TIM3 GPIO Configuration
|
/**TIM3 GPIO Configuration
|
||||||
|
PA6 ------> TIM3_CH1
|
||||||
|
PA7 ------> TIM3_CH2
|
||||||
PB0 ------> TIM3_CH3
|
PB0 ------> TIM3_CH3
|
||||||
PB1 ------> TIM3_CH4
|
PB1 ------> TIM3_CH4
|
||||||
*/
|
*/
|
||||||
|
GPIO_InitStruct.Pin = PWM_B_GAUCHE_Pin|PWM_A_GAUCHE_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
|
||||||
GPIO_InitStruct.Pin = PWM_A_DROIT_Pin|PWM_B_DROIT_Pin;
|
GPIO_InitStruct.Pin = PWM_A_DROIT_Pin|PWM_B_DROIT_Pin;
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
|
@ -365,39 +415,6 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
/**
|
|
||||||
* @brief TIM_Base MSP De-Initialization
|
|
||||||
* This function freeze the hardware resources used in this example
|
|
||||||
* @param htim_base: TIM_Base handle pointer
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
|
|
||||||
{
|
|
||||||
if(htim_base->Instance==TIM2)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM2_MspDeInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM2_MspDeInit 0 */
|
|
||||||
/* Peripheral clock disable */
|
|
||||||
__HAL_RCC_TIM2_CLK_DISABLE();
|
|
||||||
/* USER CODE BEGIN TIM2_MspDeInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM2_MspDeInit 1 */
|
|
||||||
}
|
|
||||||
else if(htim_base->Instance==TIM3)
|
|
||||||
{
|
|
||||||
/* USER CODE BEGIN TIM3_MspDeInit 0 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM3_MspDeInit 0 */
|
|
||||||
/* Peripheral clock disable */
|
|
||||||
__HAL_RCC_TIM3_CLK_DISABLE();
|
|
||||||
/* USER CODE BEGIN TIM3_MspDeInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM3_MspDeInit 1 */
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief TIM_Encoder MSP De-Initialization
|
* @brief TIM_Encoder MSP De-Initialization
|
||||||
* This function freeze the hardware resources used in this example
|
* This function freeze the hardware resources used in this example
|
||||||
|
|
@ -406,7 +423,25 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
|
||||||
*/
|
*/
|
||||||
void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef* htim_encoder)
|
void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef* htim_encoder)
|
||||||
{
|
{
|
||||||
if(htim_encoder->Instance==TIM21)
|
if(htim_encoder->Instance==TIM2)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN TIM2_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_TIM2_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**TIM2 GPIO Configuration
|
||||||
|
PA1 ------> TIM2_CH2
|
||||||
|
PA5 ------> TIM2_CH1
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOA, ENC_PHA_GAUCHE_Pin|ENC_PHB_GAUCHE_Pin);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM2_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM2_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
else if(htim_encoder->Instance==TIM21)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM21_MspDeInit 0 */
|
/* USER CODE BEGIN TIM21_MspDeInit 0 */
|
||||||
|
|
||||||
|
|
@ -424,23 +459,27 @@ void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef* htim_encoder)
|
||||||
|
|
||||||
/* USER CODE END TIM21_MspDeInit 1 */
|
/* USER CODE END TIM21_MspDeInit 1 */
|
||||||
}
|
}
|
||||||
else if(htim_encoder->Instance==TIM22)
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief TIM_Base MSP De-Initialization
|
||||||
|
* This function freeze the hardware resources used in this example
|
||||||
|
* @param htim_base: TIM_Base handle pointer
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
|
||||||
|
{
|
||||||
|
if(htim_base->Instance==TIM3)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN TIM22_MspDeInit 0 */
|
/* USER CODE BEGIN TIM3_MspDeInit 0 */
|
||||||
|
|
||||||
/* USER CODE END TIM22_MspDeInit 0 */
|
/* USER CODE END TIM3_MspDeInit 0 */
|
||||||
/* Peripheral clock disable */
|
/* Peripheral clock disable */
|
||||||
__HAL_RCC_TIM22_CLK_DISABLE();
|
__HAL_RCC_TIM3_CLK_DISABLE();
|
||||||
|
/* USER CODE BEGIN TIM3_MspDeInit 1 */
|
||||||
|
|
||||||
/**TIM22 GPIO Configuration
|
/* USER CODE END TIM3_MspDeInit 1 */
|
||||||
PA6 ------> TIM22_CH1
|
|
||||||
PA7 ------> TIM22_CH2
|
|
||||||
*/
|
|
||||||
HAL_GPIO_DeInit(GPIOA, ENC_PHB_GAUCHE_Pin|ENC_PHA_GAUCHE_Pin);
|
|
||||||
|
|
||||||
/* USER CODE BEGIN TIM22_MspDeInit 1 */
|
|
||||||
|
|
||||||
/* USER CODE END TIM22_MspDeInit 1 */
|
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -59,6 +59,8 @@
|
||||||
|
|
||||||
/* External variables --------------------------------------------------------*/
|
/* External variables --------------------------------------------------------*/
|
||||||
extern ADC_HandleTypeDef hadc;
|
extern ADC_HandleTypeDef hadc;
|
||||||
|
extern LPTIM_HandleTypeDef hlptim1;
|
||||||
|
extern DMA_HandleTypeDef hdma_lpuart1_tx;
|
||||||
extern UART_HandleTypeDef hlpuart1;
|
extern UART_HandleTypeDef hlpuart1;
|
||||||
/* USER CODE BEGIN EV */
|
/* USER CODE BEGIN EV */
|
||||||
|
|
||||||
|
|
@ -154,6 +156,20 @@ void EXTI4_15_IRQHandler(void)
|
||||||
/* USER CODE END EXTI4_15_IRQn 1 */
|
/* USER CODE END EXTI4_15_IRQn 1 */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles DMA1 channel 2 and channel 3 interrupts.
|
||||||
|
*/
|
||||||
|
void DMA1_Channel2_3_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Channel2_3_IRQn 0 */
|
||||||
|
HAL_DMA_IRQHandler(&hdma_lpuart1_tx);
|
||||||
|
/* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA1_Channel2_3_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles ADC, COMP1 and COMP2 interrupts (COMP interrupts through EXTI lines 21 and 22).
|
* @brief This function handles ADC, COMP1 and COMP2 interrupts (COMP interrupts through EXTI lines 21 and 22).
|
||||||
*/
|
*/
|
||||||
|
|
@ -168,6 +184,20 @@ void ADC1_COMP_IRQHandler(void)
|
||||||
/* USER CODE END ADC1_COMP_IRQn 1 */
|
/* USER CODE END ADC1_COMP_IRQn 1 */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles LPTIM1 global interrupt / LPTIM1 wake-up interrupt through EXTI line 29.
|
||||||
|
*/
|
||||||
|
void LPTIM1_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN LPTIM1_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END LPTIM1_IRQn 0 */
|
||||||
|
HAL_LPTIM_IRQHandler(&hlptim1);
|
||||||
|
/* USER CODE BEGIN LPTIM1_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END LPTIM1_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles LPUART1 global interrupt / LPUART1 wake-up interrupt through EXTI line 28.
|
* @brief This function handles LPUART1 global interrupt / LPUART1 wake-up interrupt through EXTI line 28.
|
||||||
*/
|
*/
|
||||||
|
|
|
||||||
|
|
@ -31,6 +31,7 @@
|
||||||
#include <sys/time.h>
|
#include <sys/time.h>
|
||||||
#include <sys/times.h>
|
#include <sys/times.h>
|
||||||
|
|
||||||
|
#include "cmsis_os.h"
|
||||||
|
|
||||||
/* Variables */
|
/* Variables */
|
||||||
extern int __io_putchar(int ch) __attribute__((weak));
|
extern int __io_putchar(int ch) __attribute__((weak));
|
||||||
|
|
@ -42,6 +43,28 @@ char **environ = __env;
|
||||||
|
|
||||||
|
|
||||||
/* Functions */
|
/* Functions */
|
||||||
|
void* malloc(size_t size)
|
||||||
|
{
|
||||||
|
void* ptr = NULL;
|
||||||
|
|
||||||
|
if(size > 0)
|
||||||
|
{
|
||||||
|
// We simply wrap the FreeRTOS call into a standard form
|
||||||
|
ptr = pvPortMalloc(size);
|
||||||
|
} // else NULL if there was an error
|
||||||
|
|
||||||
|
return ptr;
|
||||||
|
}
|
||||||
|
|
||||||
|
void free(void* ptr)
|
||||||
|
{
|
||||||
|
if(ptr)
|
||||||
|
{
|
||||||
|
// We simply wrap the FreeRTOS call into a standard form
|
||||||
|
vPortFree(ptr);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
void initialise_monitor_handles()
|
void initialise_monitor_handles()
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -7,6 +7,12 @@
|
||||||
|
|
||||||
|
|
||||||
#include "xbee.h"
|
#include "xbee.h"
|
||||||
|
#include "semphr.h"
|
||||||
|
#include <stdlib.h>
|
||||||
|
#include <string.h>
|
||||||
|
|
||||||
|
extern UART_HandleTypeDef hlpuart1;
|
||||||
|
extern DMA_HandleTypeDef hdma_lpuart1_tx;
|
||||||
|
|
||||||
StaticTask_t xTaskXbeeRX;
|
StaticTask_t xTaskXbeeRX;
|
||||||
|
|
||||||
|
|
@ -16,45 +22,82 @@ StaticTask_t xTaskXbeeRX;
|
||||||
StackType_t xStackXbeeRX[ STACK_SIZE ];
|
StackType_t xStackXbeeRX[ STACK_SIZE ];
|
||||||
TaskHandle_t xHandleXbeeRX = NULL;
|
TaskHandle_t xHandleXbeeRX = NULL;
|
||||||
|
|
||||||
StaticTask_t xTaskXbeeTX;
|
SemaphoreHandle_t xSemaphoreTX = NULL;
|
||||||
|
StaticSemaphore_t xSemaphoreTXBuffer;
|
||||||
|
|
||||||
/* Buffer that the task being created will use as its stack. Note this is
|
uint8_t* txBuffer;
|
||||||
an array of StackType_t variables. The size of StackType_t is dependent on
|
|
||||||
the RTOS port. */
|
uint8_t* rxBuffer;
|
||||||
StackType_t xStackXbeeTX[ STACK_SIZE ];
|
uint32_t rxBufferIndex;
|
||||||
TaskHandle_t xHandleXbeeTX = NULL;
|
|
||||||
|
|
||||||
void XBEE_RxThread(void* params);
|
void XBEE_RxThread(void* params);
|
||||||
void XBEE_TxThread(void* params);
|
|
||||||
|
|
||||||
void XBEE_Init(void) {
|
void XBEE_Init(void) {
|
||||||
/* Create the task without using any dynamic memory allocation. */
|
xSemaphoreTX = xSemaphoreCreateBinaryStatic( &xSemaphoreTXBuffer );
|
||||||
xHandleXbeeTX = xTaskCreateStatic(
|
xSemaphoreGive(xSemaphoreTX);
|
||||||
XBEE_TxThread, /* Function that implements the task. */
|
|
||||||
"XBEE Tx", /* Text name for the task. */
|
|
||||||
STACK_SIZE, /* Number of indexes in the xStack array. */
|
|
||||||
NULL, /* Parameter passed into the task. */
|
|
||||||
PriorityXbeeTX,/* Priority at which the task is created. */
|
|
||||||
xStackXbeeTX, /* Array to use as the task's stack. */
|
|
||||||
&xTaskXbeeTX); /* Variable to hold the task's data structure. */
|
|
||||||
vTaskResume(xHandleXbeeTX);
|
|
||||||
|
|
||||||
/* Create the task without using any dynamic memory allocation. */
|
rxBuffer=(uint8_t*)malloc(XBEE_RX_BUFFER_MAX_LENGTH);
|
||||||
xHandleXbeeRX = xTaskCreateStatic(
|
rxBufferIndex=0;
|
||||||
XBEE_RxThread, /* Function that implements the task. */
|
|
||||||
"XBEE Rx", /* Text name for the task. */
|
if(HAL_UART_Receive_IT(&hlpuart1, rxBuffer, 1)!= HAL_OK) {
|
||||||
STACK_SIZE, /* Number of indexes in the xStack array. */
|
while(1);
|
||||||
NULL, /* Parameter passed into the task. */
|
}
|
||||||
PriorityXbeeRX,/* Priority at which the task is created. */
|
|
||||||
xStackXbeeRX, /* Array to use as the task's stack. */
|
|
||||||
&xTaskXbeeRX); /* Variable to hold the task's data structure. */
|
|
||||||
vTaskResume(xHandleXbeeRX);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void XBEE_TxThread(void* params) {
|
int XBEE_SendData(char* data, int length) {
|
||||||
|
int data_length = length;
|
||||||
|
BaseType_t state;
|
||||||
|
|
||||||
|
state = xSemaphoreTake(xSemaphoreTX, pdMS_TO_TICKS(XBEE_TX_SEMAPHORE_WAIT)); // wait max 500 ms
|
||||||
|
|
||||||
|
if (state != pdFALSE) { /* test semaphore take answer */
|
||||||
|
if ((txBuffer = (uint8_t*)malloc(length))!=NULL) {
|
||||||
|
memcpy((void*)txBuffer, (void*) data, length);
|
||||||
|
|
||||||
|
if(HAL_UART_Transmit_IT(&hlpuart1, txBuffer, data_length)!= HAL_OK)
|
||||||
|
return -3;
|
||||||
|
} else return -2;
|
||||||
|
} else return -1;
|
||||||
|
|
||||||
|
return length;
|
||||||
}
|
}
|
||||||
|
|
||||||
void XBEE_RxThread(void* params) {
|
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *UartHandle) {
|
||||||
|
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
/* Do stuff here */
|
||||||
|
free (txBuffer);
|
||||||
|
|
||||||
|
xSemaphoreGiveFromISR( xSemaphoreTX, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
/* If xHigherPriorityTaskWoken was set to true you
|
||||||
|
we should yield. The actual macro used here is
|
||||||
|
port specific. */
|
||||||
|
portYIELD_FROM_ISR(xHigherPriorityTaskWoken );
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *UartHandle) {
|
||||||
|
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
|
if (rxBuffer[rxBufferIndex] == '\r') {
|
||||||
|
rxBuffer[rxBufferIndex+1]=0; // add end of string
|
||||||
|
MESSAGE_SendMailboxFromISR(SEQUENCEUR_Mailbox, MSG_ID_XBEE_CMD, (QueueHandle_t)0x0, (void*)rxBuffer, &xHigherPriorityTaskWoken);
|
||||||
|
|
||||||
|
rxBuffer = malloc(XBEE_RX_BUFFER_MAX_LENGTH);
|
||||||
|
rxBufferIndex=0;
|
||||||
|
} else if (rxBufferIndex>=XBEE_RX_BUFFER_MAX_LENGTH-2) // prevent buffer overflow
|
||||||
|
rxBufferIndex=0;
|
||||||
|
else
|
||||||
|
rxBufferIndex++;
|
||||||
|
|
||||||
|
if(HAL_UART_Receive_IT(&hlpuart1, &rxBuffer[rxBufferIndex], 1)!= HAL_OK) {
|
||||||
|
while(1);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (xHigherPriorityTaskWoken) {
|
||||||
|
/* If xHigherPriorityTaskWoken is now set to pdTRUE then a context switch
|
||||||
|
should be performed to ensure the interrupt returns directly to the highest
|
||||||
|
priority task. The macro used for this purpose is dependent on the port in
|
||||||
|
use and may be called portEND_SWITCHING_ISR(). */
|
||||||
|
portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,772 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32l0xx_hal_lptim.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Header file of LPTIM HAL module.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef STM32L0xx_HAL_LPTIM_H
|
||||||
|
#define STM32L0xx_HAL_LPTIM_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32l0xx_hal_def.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32L0xx_HAL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (LPTIM1)
|
||||||
|
|
||||||
|
/** @addtogroup LPTIM
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/** @defgroup LPTIM_Exported_Types LPTIM Exported Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT EXTI_IMR_IM29 /*!< External interrupt line 29 Connected to the LPTIM EXTI Line */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LPTIM Clock configuration definition
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t Source; /*!< Selects the clock source.
|
||||||
|
This parameter can be a value of @ref LPTIM_Clock_Source */
|
||||||
|
|
||||||
|
uint32_t Prescaler; /*!< Specifies the counter clock Prescaler.
|
||||||
|
This parameter can be a value of @ref LPTIM_Clock_Prescaler */
|
||||||
|
|
||||||
|
} LPTIM_ClockConfigTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LPTIM Clock configuration definition
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit
|
||||||
|
if the ULPTIM input is selected.
|
||||||
|
Note: This parameter is used only when Ultra low power clock source is used.
|
||||||
|
Note: If the polarity is configured on 'both edges', an auxiliary clock
|
||||||
|
(one of the Low power oscillator) must be active.
|
||||||
|
This parameter can be a value of @ref LPTIM_Clock_Polarity */
|
||||||
|
|
||||||
|
uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter.
|
||||||
|
Note: This parameter is used only when Ultra low power clock source is used.
|
||||||
|
This parameter can be a value of @ref LPTIM_Clock_Sample_Time */
|
||||||
|
|
||||||
|
} LPTIM_ULPClockConfigTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LPTIM Trigger configuration definition
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t Source; /*!< Selects the Trigger source.
|
||||||
|
This parameter can be a value of @ref LPTIM_Trigger_Source */
|
||||||
|
|
||||||
|
uint32_t ActiveEdge; /*!< Selects the Trigger active edge.
|
||||||
|
Note: This parameter is used only when an external trigger is used.
|
||||||
|
This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */
|
||||||
|
|
||||||
|
uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter.
|
||||||
|
Note: This parameter is used only when an external trigger is used.
|
||||||
|
This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */
|
||||||
|
} LPTIM_TriggerConfigTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LPTIM Initialization Structure definition
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */
|
||||||
|
|
||||||
|
LPTIM_ULPClockConfigTypeDef UltraLowPowerClock;/*!< Specifies the Ultra Low Power clock parameters */
|
||||||
|
|
||||||
|
LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */
|
||||||
|
|
||||||
|
uint32_t OutputPolarity; /*!< Specifies the Output polarity.
|
||||||
|
This parameter can be a value of @ref LPTIM_Output_Polarity */
|
||||||
|
|
||||||
|
uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare
|
||||||
|
values is done immediately or after the end of current period.
|
||||||
|
This parameter can be a value of @ref LPTIM_Updating_Mode */
|
||||||
|
|
||||||
|
uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event
|
||||||
|
or each external event.
|
||||||
|
This parameter can be a value of @ref LPTIM_Counter_Source */
|
||||||
|
} LPTIM_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief HAL LPTIM State structure definition
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */
|
||||||
|
HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
|
||||||
|
HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
|
||||||
|
HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
|
||||||
|
HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */
|
||||||
|
} HAL_LPTIM_StateTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LPTIM handle Structure definition
|
||||||
|
*/
|
||||||
|
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
||||||
|
typedef struct __LPTIM_HandleTypeDef
|
||||||
|
#else
|
||||||
|
typedef struct
|
||||||
|
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
||||||
|
{
|
||||||
|
LPTIM_TypeDef *Instance; /*!< Register base address */
|
||||||
|
|
||||||
|
LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */
|
||||||
|
|
||||||
|
HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */
|
||||||
|
|
||||||
|
HAL_LockTypeDef Lock; /*!< LPTIM locking object */
|
||||||
|
|
||||||
|
__IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */
|
||||||
|
|
||||||
|
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
||||||
|
void (* MspInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp Init Callback */
|
||||||
|
void (* MspDeInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp DeInit Callback */
|
||||||
|
void (* CompareMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare match Callback */
|
||||||
|
void (* AutoReloadMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload match Callback */
|
||||||
|
void (* TriggerCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< External trigger event detection Callback */
|
||||||
|
void (* CompareWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare register write complete Callback */
|
||||||
|
void (* AutoReloadWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload register write complete Callback */
|
||||||
|
void (* DirectionUpCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Up-counting direction change Callback */
|
||||||
|
void (* DirectionDownCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Down-counting direction change Callback */
|
||||||
|
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
||||||
|
} LPTIM_HandleTypeDef;
|
||||||
|
|
||||||
|
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
||||||
|
/**
|
||||||
|
* @brief HAL LPTIM Callback ID enumeration definition
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM Base Msp Init Callback ID */
|
||||||
|
HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM Base Msp DeInit Callback ID */
|
||||||
|
HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< Compare match Callback ID */
|
||||||
|
HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U, /*!< Auto-reload match Callback ID */
|
||||||
|
HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< External trigger event detection Callback ID */
|
||||||
|
HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< Compare register write complete Callback ID */
|
||||||
|
HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U, /*!< Auto-reload register write complete Callback ID */
|
||||||
|
HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< Up-counting direction change Callback ID */
|
||||||
|
HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< Down-counting direction change Callback ID */
|
||||||
|
} HAL_LPTIM_CallbackIDTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief HAL TIM Callback pointer definition
|
||||||
|
*/
|
||||||
|
typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< pointer to the LPTIM callback function */
|
||||||
|
|
||||||
|
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_Clock_Source LPTIM Clock Source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00000000U
|
||||||
|
#define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LPTIM_PRESCALER_DIV1 0x00000000U
|
||||||
|
#define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0
|
||||||
|
#define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1
|
||||||
|
#define LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1)
|
||||||
|
#define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2
|
||||||
|
#define LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2)
|
||||||
|
#define LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2)
|
||||||
|
#define LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_Output_Polarity LPTIM Output Polarity
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define LPTIM_OUTPUTPOLARITY_HIGH 0x00000000U
|
||||||
|
#define LPTIM_OUTPUTPOLARITY_LOW LPTIM_CFGR_WAVPOL
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U
|
||||||
|
#define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0
|
||||||
|
#define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1
|
||||||
|
#define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LPTIM_CLOCKPOLARITY_RISING 0x00000000U
|
||||||
|
#define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0
|
||||||
|
#define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU
|
||||||
|
#define LPTIM_TRIGSOURCE_0 0x00000000U
|
||||||
|
#define LPTIM_TRIGSOURCE_1 LPTIM_CFGR_TRIGSEL_0
|
||||||
|
#define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1
|
||||||
|
#define LPTIM_TRIGSOURCE_3 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1)
|
||||||
|
#define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2
|
||||||
|
#define LPTIM_TRIGSOURCE_5 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2)
|
||||||
|
#define LPTIM_TRIGSOURCE_6 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2)
|
||||||
|
#define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0
|
||||||
|
#define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1
|
||||||
|
#define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U
|
||||||
|
#define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0
|
||||||
|
#define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1
|
||||||
|
#define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define LPTIM_UPDATE_IMMEDIATE 0x00000000U
|
||||||
|
#define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_Counter_Source LPTIM Counter Source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U
|
||||||
|
#define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN
|
||||||
|
#define LPTIM_FLAG_UP LPTIM_ISR_UP
|
||||||
|
#define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK
|
||||||
|
#define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK
|
||||||
|
#define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG
|
||||||
|
#define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM
|
||||||
|
#define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LPTIM_IT_DOWN LPTIM_IER_DOWNIE
|
||||||
|
#define LPTIM_IT_UP LPTIM_IER_UPIE
|
||||||
|
#define LPTIM_IT_ARROK LPTIM_IER_ARROKIE
|
||||||
|
#define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE
|
||||||
|
#define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE
|
||||||
|
#define LPTIM_IT_ARRM LPTIM_IER_ARRMIE
|
||||||
|
#define LPTIM_IT_CMPM LPTIM_IER_CMPMIE
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported macros -----------------------------------------------------------*/
|
||||||
|
/** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @brief Reset LPTIM handle state.
|
||||||
|
* @param __HANDLE__ LPTIM handle
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
||||||
|
#define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \
|
||||||
|
(__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \
|
||||||
|
(__HANDLE__)->MspInitCallback = NULL; \
|
||||||
|
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||||
|
} while(0)
|
||||||
|
#else
|
||||||
|
#define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET)
|
||||||
|
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable the LPTIM peripheral.
|
||||||
|
* @param __HANDLE__ LPTIM handle
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disable the LPTIM peripheral.
|
||||||
|
* @param __HANDLE__ LPTIM handle
|
||||||
|
* @note The following sequence is required to solve LPTIM disable HW limitation.
|
||||||
|
* Please check Errata Sheet ES0335 for more details under "MCU may remain
|
||||||
|
* stuck in LPTIM interrupt when entering Stop mode" section.
|
||||||
|
* @note Please call @ref HAL_LPTIM_GetState() after a call to __HAL_LPTIM_DISABLE to
|
||||||
|
* check for TIMEOUT.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_DISABLE(__HANDLE__) LPTIM_Disable(__HANDLE__)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Start the LPTIM peripheral in Continuous mode.
|
||||||
|
* @param __HANDLE__ LPTIM handle
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT)
|
||||||
|
/**
|
||||||
|
* @brief Start the LPTIM peripheral in single mode.
|
||||||
|
* @param __HANDLE__ LPTIM handle
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Write the passed parameter in the Autoreload register.
|
||||||
|
* @param __HANDLE__ LPTIM handle
|
||||||
|
* @param __VALUE__ Autoreload value
|
||||||
|
* @retval None
|
||||||
|
* @note The ARR register can only be modified when the LPTIM instance is enabled.
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Write the passed parameter in the Compare register.
|
||||||
|
* @param __HANDLE__ LPTIM handle
|
||||||
|
* @param __VALUE__ Compare value
|
||||||
|
* @retval None
|
||||||
|
* @note The CMP register can only be modified when the LPTIM instance is enabled.
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check whether the specified LPTIM flag is set or not.
|
||||||
|
* @param __HANDLE__ LPTIM handle
|
||||||
|
* @param __FLAG__ LPTIM flag to check
|
||||||
|
* This parameter can be a value of:
|
||||||
|
* @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
|
||||||
|
* @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
|
||||||
|
* @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
|
||||||
|
* @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
|
||||||
|
* @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
|
||||||
|
* @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
|
||||||
|
* @arg LPTIM_FLAG_CMPM : Compare match Flag.
|
||||||
|
* @retval The state of the specified flag (SET or RESET).
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Clear the specified LPTIM flag.
|
||||||
|
* @param __HANDLE__ LPTIM handle.
|
||||||
|
* @param __FLAG__ LPTIM flag to clear.
|
||||||
|
* This parameter can be a value of:
|
||||||
|
* @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
|
||||||
|
* @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
|
||||||
|
* @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
|
||||||
|
* @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
|
||||||
|
* @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
|
||||||
|
* @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
|
||||||
|
* @arg LPTIM_FLAG_CMPM : Compare match Flag.
|
||||||
|
* @retval None.
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable the specified LPTIM interrupt.
|
||||||
|
* @param __HANDLE__ LPTIM handle.
|
||||||
|
* @param __INTERRUPT__ LPTIM interrupt to set.
|
||||||
|
* This parameter can be a value of:
|
||||||
|
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
|
||||||
|
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
|
||||||
|
* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
|
||||||
|
* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
|
||||||
|
* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
|
||||||
|
* @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
|
||||||
|
* @arg LPTIM_IT_CMPM : Compare match Interrupt.
|
||||||
|
* @retval None.
|
||||||
|
* @note The LPTIM interrupts can only be enabled when the LPTIM instance is disabled.
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disable the specified LPTIM interrupt.
|
||||||
|
* @param __HANDLE__ LPTIM handle.
|
||||||
|
* @param __INTERRUPT__ LPTIM interrupt to set.
|
||||||
|
* This parameter can be a value of:
|
||||||
|
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
|
||||||
|
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
|
||||||
|
* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
|
||||||
|
* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
|
||||||
|
* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
|
||||||
|
* @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
|
||||||
|
* @arg LPTIM_IT_CMPM : Compare match Interrupt.
|
||||||
|
* @retval None.
|
||||||
|
* @note The LPTIM interrupts can only be disabled when the LPTIM instance is disabled.
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check whether the specified LPTIM interrupt source is enabled or not.
|
||||||
|
* @param __HANDLE__ LPTIM handle.
|
||||||
|
* @param __INTERRUPT__ LPTIM interrupt to check.
|
||||||
|
* This parameter can be a value of:
|
||||||
|
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
|
||||||
|
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
|
||||||
|
* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
|
||||||
|
* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
|
||||||
|
* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
|
||||||
|
* @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
|
||||||
|
* @arg LPTIM_IT_CMPM : Compare match Interrupt.
|
||||||
|
* @retval Interrupt status.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER\
|
||||||
|
& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable interrupt on the LPTIM Wake-up Timer associated Exti line.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR\
|
||||||
|
|= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disable interrupt on the LPTIM Wake-up Timer associated Exti line.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR\
|
||||||
|
&= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable event on the LPTIM Wake-up Timer associated Exti line.
|
||||||
|
* @retval None.
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR\
|
||||||
|
|= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disable event on the LPTIM Wake-up Timer associated Exti line.
|
||||||
|
* @retval None.
|
||||||
|
*/
|
||||||
|
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR\
|
||||||
|
&= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup LPTIM_Exported_Functions_Group1
|
||||||
|
* @brief Initialization and Configuration functions.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Initialization/de-initialization functions ********************************/
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
|
||||||
|
/* MSP functions *************************************************************/
|
||||||
|
void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup LPTIM_Exported_Functions_Group2
|
||||||
|
* @brief Start-Stop operation functions.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Start/Stop operation functions *********************************************/
|
||||||
|
/* ################################# PWM Mode ################################*/
|
||||||
|
/* Blocking mode: Polling */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
/* Non-Blocking mode: Interrupt */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
|
||||||
|
/* ############################# One Pulse Mode ##############################*/
|
||||||
|
/* Blocking mode: Polling */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
/* Non-Blocking mode: Interrupt */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
|
||||||
|
/* ############################## Set once Mode ##############################*/
|
||||||
|
/* Blocking mode: Polling */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
/* Non-Blocking mode: Interrupt */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
|
||||||
|
/* ############################### Encoder Mode ##############################*/
|
||||||
|
/* Blocking mode: Polling */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
/* Non-Blocking mode: Interrupt */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
|
||||||
|
/* ############################# Time out Mode ##############################*/
|
||||||
|
/* Blocking mode: Polling */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
/* Non-Blocking mode: Interrupt */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
|
||||||
|
/* ############################## Counter Mode ###############################*/
|
||||||
|
/* Blocking mode: Polling */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
/* Non-Blocking mode: Interrupt */
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup LPTIM_Exported_Functions_Group3
|
||||||
|
* @brief Read operation functions.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Reading operation functions ************************************************/
|
||||||
|
uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup LPTIM_Exported_Functions_Group4
|
||||||
|
* @brief LPTIM IRQ handler and callback functions.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* LPTIM IRQ functions *******************************************************/
|
||||||
|
void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
|
||||||
|
/* CallBack functions ********************************************************/
|
||||||
|
void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
|
||||||
|
/* Callbacks Register/UnRegister functions ***********************************/
|
||||||
|
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID,
|
||||||
|
pLPTIM_CallbackTypeDef pCallback);
|
||||||
|
HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID);
|
||||||
|
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup LPTIM_Group5
|
||||||
|
* @brief Peripheral State functions.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Peripheral State functions ************************************************/
|
||||||
|
HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/** @defgroup LPTIM_Private_Types LPTIM Private Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/** @defgroup LPTIM_Private_Variables LPTIM Private Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/** @defgroup LPTIM_Private_Constants LPTIM Private Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/** @defgroup LPTIM_Private_Macros LPTIM Private Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \
|
||||||
|
((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC))
|
||||||
|
|
||||||
|
|
||||||
|
#define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \
|
||||||
|
((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \
|
||||||
|
((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \
|
||||||
|
((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \
|
||||||
|
((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \
|
||||||
|
((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \
|
||||||
|
((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \
|
||||||
|
((__PRESCALER__) == LPTIM_PRESCALER_DIV128))
|
||||||
|
|
||||||
|
#define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1)
|
||||||
|
|
||||||
|
#define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \
|
||||||
|
((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH))
|
||||||
|
|
||||||
|
#define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \
|
||||||
|
((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \
|
||||||
|
((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \
|
||||||
|
((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS))
|
||||||
|
|
||||||
|
#define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \
|
||||||
|
((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \
|
||||||
|
((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING))
|
||||||
|
|
||||||
|
#define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \
|
||||||
|
((__TRIG__) == LPTIM_TRIGSOURCE_0) || \
|
||||||
|
((__TRIG__) == LPTIM_TRIGSOURCE_1) || \
|
||||||
|
((__TRIG__) == LPTIM_TRIGSOURCE_2) || \
|
||||||
|
((__TRIG__) == LPTIM_TRIGSOURCE_3) || \
|
||||||
|
((__TRIG__) == LPTIM_TRIGSOURCE_4) || \
|
||||||
|
((__TRIG__) == LPTIM_TRIGSOURCE_5) || \
|
||||||
|
((__TRIG__) == LPTIM_TRIGSOURCE_6) || \
|
||||||
|
((__TRIG__) == LPTIM_TRIGSOURCE_7))
|
||||||
|
|
||||||
|
#define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \
|
||||||
|
((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \
|
||||||
|
((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING ))
|
||||||
|
|
||||||
|
#define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \
|
||||||
|
((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \
|
||||||
|
((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \
|
||||||
|
((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS ))
|
||||||
|
|
||||||
|
#define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \
|
||||||
|
((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD))
|
||||||
|
|
||||||
|
#define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \
|
||||||
|
((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL))
|
||||||
|
|
||||||
|
#define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFFUL)
|
||||||
|
|
||||||
|
#define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL)
|
||||||
|
|
||||||
|
#define IS_LPTIM_PERIOD(__PERIOD__) ((__PERIOD__) <= 0x0000FFFFUL)
|
||||||
|
|
||||||
|
#define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFUL)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private functions ---------------------------------------------------------*/
|
||||||
|
/** @defgroup LPTIM_Private_Functions LPTIM Private Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* LPTIM1 */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STM32L0xx_HAL_LPTIM_H */
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -2,6 +2,17 @@
|
||||||
ADC.IPParameters=SamplingTime,Resolution
|
ADC.IPParameters=SamplingTime,Resolution
|
||||||
ADC.Resolution=ADC_RESOLUTION_8B
|
ADC.Resolution=ADC_RESOLUTION_8B
|
||||||
ADC.SamplingTime=ADC_SAMPLETIME_160CYCLES_5
|
ADC.SamplingTime=ADC_SAMPLETIME_160CYCLES_5
|
||||||
|
Dma.LPUART1_TX.0.Direction=DMA_MEMORY_TO_PERIPH
|
||||||
|
Dma.LPUART1_TX.0.Instance=DMA1_Channel2
|
||||||
|
Dma.LPUART1_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||||
|
Dma.LPUART1_TX.0.MemInc=DMA_MINC_ENABLE
|
||||||
|
Dma.LPUART1_TX.0.Mode=DMA_NORMAL
|
||||||
|
Dma.LPUART1_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||||
|
Dma.LPUART1_TX.0.PeriphInc=DMA_PINC_DISABLE
|
||||||
|
Dma.LPUART1_TX.0.Priority=DMA_PRIORITY_LOW
|
||||||
|
Dma.LPUART1_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
|
||||||
|
Dma.Request0=LPUART1_TX
|
||||||
|
Dma.RequestsNb=1
|
||||||
FREERTOS.INCLUDE_pcTaskGetTaskName=1
|
FREERTOS.INCLUDE_pcTaskGetTaskName=1
|
||||||
FREERTOS.INCLUDE_xEventGroupSetBitFromISR=1
|
FREERTOS.INCLUDE_xEventGroupSetBitFromISR=1
|
||||||
FREERTOS.INCLUDE_xTaskAbortDelay=1
|
FREERTOS.INCLUDE_xTaskAbortDelay=1
|
||||||
|
|
@ -20,28 +31,29 @@ LPUART1.IPParameters=BaudRate,WordLength
|
||||||
LPUART1.WordLength=UART_WORDLENGTH_8B
|
LPUART1.WordLength=UART_WORDLENGTH_8B
|
||||||
Mcu.Family=STM32L0
|
Mcu.Family=STM32L0
|
||||||
Mcu.IP0=ADC
|
Mcu.IP0=ADC
|
||||||
Mcu.IP1=FREERTOS
|
Mcu.IP1=DMA
|
||||||
Mcu.IP2=LPUART1
|
Mcu.IP10=TIM21
|
||||||
Mcu.IP3=NVIC
|
Mcu.IP2=FREERTOS
|
||||||
Mcu.IP4=RCC
|
Mcu.IP3=LPTIM1
|
||||||
Mcu.IP5=SYS
|
Mcu.IP4=LPUART1
|
||||||
Mcu.IP6=TIM2
|
Mcu.IP5=NVIC
|
||||||
Mcu.IP7=TIM3
|
Mcu.IP6=RCC
|
||||||
Mcu.IP8=TIM21
|
Mcu.IP7=SYS
|
||||||
Mcu.IP9=TIM22
|
Mcu.IP8=TIM2
|
||||||
Mcu.IPNb=10
|
Mcu.IP9=TIM3
|
||||||
|
Mcu.IPNb=11
|
||||||
Mcu.Name=STM32L071C(B-Z)Tx
|
Mcu.Name=STM32L071C(B-Z)Tx
|
||||||
Mcu.Package=LQFP48
|
Mcu.Package=LQFP48
|
||||||
Mcu.Pin0=PA0
|
Mcu.Pin0=PA0
|
||||||
Mcu.Pin1=PA1
|
Mcu.Pin1=PA1
|
||||||
Mcu.Pin10=PB12
|
Mcu.Pin10=PB11
|
||||||
Mcu.Pin11=PB13
|
Mcu.Pin11=PB12
|
||||||
Mcu.Pin12=PB14
|
Mcu.Pin12=PB13
|
||||||
Mcu.Pin13=PB15
|
Mcu.Pin13=PB14
|
||||||
Mcu.Pin14=PA10
|
Mcu.Pin14=PB15
|
||||||
Mcu.Pin15=PA13
|
Mcu.Pin15=PA10
|
||||||
Mcu.Pin16=PA14
|
Mcu.Pin16=PA13
|
||||||
Mcu.Pin17=PA15
|
Mcu.Pin17=PA14
|
||||||
Mcu.Pin18=PB3
|
Mcu.Pin18=PB3
|
||||||
Mcu.Pin19=PB4
|
Mcu.Pin19=PB4
|
||||||
Mcu.Pin2=PA2
|
Mcu.Pin2=PA2
|
||||||
|
|
@ -50,16 +62,16 @@ Mcu.Pin21=PB7
|
||||||
Mcu.Pin22=PB8
|
Mcu.Pin22=PB8
|
||||||
Mcu.Pin23=PB9
|
Mcu.Pin23=PB9
|
||||||
Mcu.Pin24=VP_FREERTOS_VS_CMSIS_V2
|
Mcu.Pin24=VP_FREERTOS_VS_CMSIS_V2
|
||||||
Mcu.Pin25=VP_SYS_VS_Systick
|
Mcu.Pin25=VP_LPTIM1_VS_LPTIM_counterModeInternalClock
|
||||||
Mcu.Pin26=VP_TIM2_VS_ClockSourceINT
|
Mcu.Pin26=VP_SYS_VS_Systick
|
||||||
Mcu.Pin27=VP_TIM3_VS_ClockSourceINT
|
Mcu.Pin27=VP_TIM3_VS_ClockSourceINT
|
||||||
Mcu.Pin3=PA3
|
Mcu.Pin3=PA3
|
||||||
Mcu.Pin4=PA6
|
Mcu.Pin4=PA5
|
||||||
Mcu.Pin5=PA7
|
Mcu.Pin5=PA6
|
||||||
Mcu.Pin6=PB0
|
Mcu.Pin6=PA7
|
||||||
Mcu.Pin7=PB1
|
Mcu.Pin7=PB0
|
||||||
Mcu.Pin8=PB10
|
Mcu.Pin8=PB1
|
||||||
Mcu.Pin9=PB11
|
Mcu.Pin9=PB10
|
||||||
Mcu.PinsNb=28
|
Mcu.PinsNb=28
|
||||||
Mcu.ThirdPartyNb=0
|
Mcu.ThirdPartyNb=0
|
||||||
Mcu.UserConstants=
|
Mcu.UserConstants=
|
||||||
|
|
@ -67,10 +79,12 @@ Mcu.UserName=STM32L071CBTx
|
||||||
MxCube.Version=6.3.0
|
MxCube.Version=6.3.0
|
||||||
MxDb.Version=DB.6.0.30
|
MxDb.Version=DB.6.0.30
|
||||||
NVIC.ADC1_COMP_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true
|
NVIC.ADC1_COMP_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true
|
||||||
|
NVIC.DMA1_Channel2_3_IRQn=true\:3\:0\:false\:false\:true\:true\:false\:true
|
||||||
NVIC.EXTI2_3_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true
|
NVIC.EXTI2_3_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true
|
||||||
NVIC.EXTI4_15_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true
|
NVIC.EXTI4_15_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true
|
||||||
NVIC.ForceEnableDMAVector=true
|
NVIC.ForceEnableDMAVector=true
|
||||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
|
NVIC.LPTIM1_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true
|
||||||
NVIC.LPUART1_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true
|
NVIC.LPUART1_IRQn=true\:3\:0\:false\:false\:true\:true\:true\:true
|
||||||
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
NVIC.PendSV_IRQn=true\:3\:0\:false\:false\:false\:true\:false\:false
|
NVIC.PendSV_IRQn=true\:3\:0\:false\:false\:false\:true\:false\:false
|
||||||
|
|
@ -83,9 +97,9 @@ PA0.GPIOParameters=GPIO_Label
|
||||||
PA0.GPIO_Label=BATTERY_SENSE
|
PA0.GPIO_Label=BATTERY_SENSE
|
||||||
PA0.Mode=IN0
|
PA0.Mode=IN0
|
||||||
PA0.Signal=ADC_IN0
|
PA0.Signal=ADC_IN0
|
||||||
PA1.GPIOParameters=GPIO_Speed,GPIO_Label
|
PA1.GPIOParameters=GPIO_Label
|
||||||
PA1.GPIO_Label=PWM_B_GAUCHE
|
PA1.GPIO_Label=ENC_PHA_GAUCHE
|
||||||
PA1.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
PA1.Locked=true
|
||||||
PA1.Signal=S_TIM2_CH2
|
PA1.Signal=S_TIM2_CH2
|
||||||
PA10.GPIOParameters=GPIO_Label
|
PA10.GPIOParameters=GPIO_Label
|
||||||
PA10.GPIO_Label=XBEE_RESET
|
PA10.GPIO_Label=XBEE_RESET
|
||||||
|
|
@ -95,11 +109,6 @@ PA13.Mode=Serial_Wire
|
||||||
PA13.Signal=SYS_SWDIO
|
PA13.Signal=SYS_SWDIO
|
||||||
PA14.Mode=Serial_Wire
|
PA14.Mode=Serial_Wire
|
||||||
PA14.Signal=SYS_SWCLK
|
PA14.Signal=SYS_SWCLK
|
||||||
PA15.GPIOParameters=GPIO_Speed,GPIO_Label
|
|
||||||
PA15.GPIO_Label=PWM_A_GAUCHE
|
|
||||||
PA15.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
|
||||||
PA15.Locked=true
|
|
||||||
PA15.Signal=S_TIM2_CH1
|
|
||||||
PA2.GPIOParameters=GPIO_Label
|
PA2.GPIOParameters=GPIO_Label
|
||||||
PA2.GPIO_Label=ENC_PHA_DROIT
|
PA2.GPIO_Label=ENC_PHA_DROIT
|
||||||
PA2.Locked=true
|
PA2.Locked=true
|
||||||
|
|
@ -108,12 +117,18 @@ PA3.GPIOParameters=GPIO_Label
|
||||||
PA3.GPIO_Label=ENC_PHB_DROIT
|
PA3.GPIO_Label=ENC_PHB_DROIT
|
||||||
PA3.Locked=true
|
PA3.Locked=true
|
||||||
PA3.Signal=S_TIM21_CH2
|
PA3.Signal=S_TIM21_CH2
|
||||||
|
PA5.GPIOParameters=GPIO_Label
|
||||||
|
PA5.GPIO_Label=ENC_PHB_GAUCHE
|
||||||
|
PA5.Locked=true
|
||||||
|
PA5.Signal=S_TIM2_CH1
|
||||||
PA6.GPIOParameters=GPIO_Label
|
PA6.GPIOParameters=GPIO_Label
|
||||||
PA6.GPIO_Label=ENC_PHB_GAUCHE
|
PA6.GPIO_Label=PWM_B_GAUCHE
|
||||||
PA6.Signal=S_TIM22_CH1
|
PA6.Locked=true
|
||||||
|
PA6.Signal=S_TIM3_CH1
|
||||||
PA7.GPIOParameters=GPIO_Label
|
PA7.GPIOParameters=GPIO_Label
|
||||||
PA7.GPIO_Label=ENC_PHA_GAUCHE
|
PA7.GPIO_Label=PWM_A_GAUCHE
|
||||||
PA7.Signal=S_TIM22_CH2
|
PA7.Locked=true
|
||||||
|
PA7.Signal=S_TIM3_CH2
|
||||||
PB0.GPIOParameters=GPIO_Speed,GPIO_Label
|
PB0.GPIOParameters=GPIO_Speed,GPIO_Label
|
||||||
PB0.GPIO_Label=PWM_A_DROIT
|
PB0.GPIO_Label=PWM_A_DROIT
|
||||||
PB0.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
PB0.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
||||||
|
|
@ -210,7 +225,7 @@ ProjectManager.StackSize=0x200
|
||||||
ProjectManager.TargetToolchain=STM32CubeIDE
|
ProjectManager.TargetToolchain=STM32CubeIDE
|
||||||
ProjectManager.ToolChainLocation=
|
ProjectManager.ToolChainLocation=
|
||||||
ProjectManager.UnderRoot=true
|
ProjectManager.UnderRoot=true
|
||||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ADC_Init-ADC-false-HAL-true,4-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_TIM21_Init-TIM21-false-HAL-true,8-MX_TIM22_Init-TIM22-false-HAL-true
|
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ADC_Init-ADC-false-HAL-true,4-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_TIM21_Init-TIM21-false-HAL-true,8-MX_DMA_Init-DMA-false-HAL-true
|
||||||
RCC.ADCFreq_Value=4000000
|
RCC.ADCFreq_Value=4000000
|
||||||
RCC.AHBFreq_Value=6000000
|
RCC.AHBFreq_Value=6000000
|
||||||
RCC.APB1Freq_Value=6000000
|
RCC.APB1Freq_Value=6000000
|
||||||
|
|
@ -254,30 +269,29 @@ SH.S_TIM21_CH1.0=TIM21_CH1,Encoder_Interface
|
||||||
SH.S_TIM21_CH1.ConfNb=1
|
SH.S_TIM21_CH1.ConfNb=1
|
||||||
SH.S_TIM21_CH2.0=TIM21_CH2,Encoder_Interface
|
SH.S_TIM21_CH2.0=TIM21_CH2,Encoder_Interface
|
||||||
SH.S_TIM21_CH2.ConfNb=1
|
SH.S_TIM21_CH2.ConfNb=1
|
||||||
SH.S_TIM22_CH1.0=TIM22_CH1,Encoder_Interface
|
SH.S_TIM2_CH1.0=TIM2_CH1,Encoder_Interface
|
||||||
SH.S_TIM22_CH1.ConfNb=1
|
|
||||||
SH.S_TIM22_CH2.0=TIM22_CH2,Encoder_Interface
|
|
||||||
SH.S_TIM22_CH2.ConfNb=1
|
|
||||||
SH.S_TIM2_CH1.0=TIM2_CH1,PWM Generation1 CH1
|
|
||||||
SH.S_TIM2_CH1.ConfNb=1
|
SH.S_TIM2_CH1.ConfNb=1
|
||||||
SH.S_TIM2_CH2.0=TIM2_CH2,PWM Generation2 CH2
|
SH.S_TIM2_CH2.0=TIM2_CH2,Encoder_Interface
|
||||||
SH.S_TIM2_CH2.ConfNb=1
|
SH.S_TIM2_CH2.ConfNb=1
|
||||||
|
SH.S_TIM3_CH1.0=TIM3_CH1,PWM Generation1 CH1
|
||||||
|
SH.S_TIM3_CH1.ConfNb=1
|
||||||
|
SH.S_TIM3_CH2.0=TIM3_CH2,PWM Generation2 CH2
|
||||||
|
SH.S_TIM3_CH2.ConfNb=1
|
||||||
SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3
|
SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3
|
||||||
SH.S_TIM3_CH3.ConfNb=1
|
SH.S_TIM3_CH3.ConfNb=1
|
||||||
SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4
|
SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4
|
||||||
SH.S_TIM3_CH4.ConfNb=1
|
SH.S_TIM3_CH4.ConfNb=1
|
||||||
TIM2.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
|
TIM3.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
|
||||||
TIM2.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
|
TIM3.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
|
||||||
TIM2.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2
|
|
||||||
TIM3.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
|
TIM3.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
|
||||||
TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
||||||
TIM3.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4
|
TIM3.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4,Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2
|
||||||
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
|
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
|
||||||
VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
|
VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
|
||||||
|
VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
|
||||||
|
VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Signal=LPTIM1_VS_LPTIM_counterModeInternalClock
|
||||||
VP_SYS_VS_Systick.Mode=SysTick
|
VP_SYS_VS_Systick.Mode=SysTick
|
||||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||||
VP_TIM2_VS_ClockSourceINT.Mode=Internal
|
|
||||||
VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
|
|
||||||
VP_TIM3_VS_ClockSourceINT.Mode=Internal
|
VP_TIM3_VS_ClockSourceINT.Mode=Internal
|
||||||
VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT
|
VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT
|
||||||
board=custom
|
board=custom
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue